TCAN4550: Schematic check

I have reviewed the schematic and have the following comments.

• Please review the TCAN455x Clock Optimization and Design Guidelines Application Report (Link)
• We recommend placing a series resistor between the OSC1 pin and the crystal so that it can be used to limit the current flowing through the crystal and optimize the crystal circuit for stable operation.  A 0-ohm resistor can be used initially until a larger value is determined if necessary.
• The TCAN4550 has an internal 500k feedback resistor between the OSC1 and OSC2 pins, so the external 1M resistor (R0217) is not required.
• The nINT pin is open-drain and requires a pull-up resistor to VIO
• Note the RST pin is active High, so it must remain Low for normal operation
• The nWKRQ pin is by default driven to 3.6V generated by an internal voltage rail when the device is in Sleep Mode.  This pin can be configured to be open-drain through the registers and if so it can use a pull-up resistor to the VIO voltage if one is provided.
• The VCCOUT pin requires a minimum of 10uF of decoupling capacitor.  This is the internal 5V LDO and it needs this capacitance to remain a stable voltage regulation.

Regards,

Jonathan