• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 71 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

TMDS1204: tmds1204

TMDS1204: tmds1204

Vaishnavi P
Prodigy 90 points
Part Number: TMDS1204

Tool/software:

I am having one query regarding TMDS1204 IC, refer below image, in that i am seeing one MUX functionality internally there in the redriver IC, in that MUX toFPGA connection, FRL data pin and the RCLKPin is connected, who will enable that mux, or based on my sink or source input, i can use that mux 2.1 and 2.0 HDMI application., or hardware side i have it change any pin strap setting for this 2.1/2.0 HDMI selection., or i will enable 2.0, it will only work at 2.0, like that. Please explain how it should be?

  • 0
    TI__Guru**** 177476 points

    Hi,

    When the fan-out buffer feature is enabled, the TMDS1204 will output the HDMI clock on RCLKOUTp/n when operating in HDMI 1.4 or HDMI 2.0. The OUT_CLKp/n will be disabled. When operating in HDMI 2.1 FRL mode, the TMDS1204 will output FRL data3 on OUT_CLKp/n. RCLKOUTp/n will be disabled. The feature is enabled in pin-strap mode when MODE pin = "R" or it can be enable through FANOUT_EN register when TMDS1204 is configured for I2C mode.

    Using the DDC snooping, TMDS1204 monitors offsets 20h and 31h to determine HDMI type as either HDMI 1.4, HDMI 2.0, or HDMI 2.1 FRL. You can also write to register 0x20h and 0x31h to force the HDMI type to be either 1.4, 2.0, or 2.1.

    Thanks

    David