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Original question:

DP83867E: BMSR Adress

DP83867E: Transaction gap

Hiroaki Yuyama TED
Expert 1720 points
Part Number: DP83867E

Tool/software:

Dear PHY Support Team.

I was supported by J-San.
I will post the rest of that in this thread.

We have received an inquiry after issuing a PCN to our customer.

This customer has said that based on past Q&A exchanges, it is difficult to theoretically prove that their products will not be affected.

(Or, they think it is impossible.)

We need evidence that will not affect continued use of this product without taking any measures.

We apologize for making repeated requests.
Additional request from the customer.

Q1) Have there been any cases in the past where other customers have reported problems where the "gap between transactions is less than 500ns" and this was the cause of the problem?

Q2) Was the case in Q1 the trigger for updating the datasheet?

Ultimately, they would like to determine whether the software/firmware is okay to use as is even after issuing a DP83867E PCN.

DP83867E: BMSR Adress - Interface forum - Interface - TI E2E support forums

Best Regards,
Hiroaki Yuyama

  • 0
    TI__Mastermind 39795 points

    Hello,

    It appears that there had been a case in which a customer had enabled consecutive register transactions without this gap and edge, leading to invalid register commands. This is a clarification of the device's functionality and cannot be disabled. It would be recommended for customer to ensure that there is gap between consecutive register access, else as conservative approach to include preamble in all SMI transaction.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    Expert 1720 points

    Hello,Gerome-san,

    Thank you for your reply.
    We have told our customers to code or design MDIO/MDC timing to ensure that the gap between transactions is at least 500ns.

    Best Regards,
    Hiroaki Yuyama