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Original question:

DP83869HM: 25 MHz or 125 MHz for 1000Mbps, does it matter?

DP83869HM: Understanding the purpose of the XI pin

Jennifer Bernal
Genius 16495 points
Part Number: DP83869HM

Tool/software:

Hello ePHY team,

  1. Can you please provide more detail on the purpose of the XI input clock?
  2. In the datasheet, the term "local reference clock" is used. Does that refer to the XI input clock? If so, then it's conflicting with the text I highlighted below. The text says the local reference clock is recovered
    from the Ethernet packet.
  3. My confusion is this:
    1. If we recover the clock from the network for RX_CLK and if we receive the clock from the MAC for GTX_CLK, then why do we need the XI clock?
    2. I don't see other timing diagrams using the XI besides the start-up or reset, I guess it's used for the MDC? Also, what is "Signal Output" mean in Figure 6-2?

Thank you,

Jennifer

  • 0
    TI__Guru**** 176811 points

    Jennifer

    Please see my response:

    Can you please provide more detail on the purpose of the XI input clock?

    The PHY needs 25MHz input clock on XI in all modes. This should come from a crystal or external oscillator. This clock is embedded into the transmitted network packet data. So you still need to XI to provide a clock reference to the data being sent out on the MDI bus.

    In the datasheet, the term "local reference clock" is used. Does that refer to the XI input clock? If so, then it's conflicting with the text I highlighted below. The text says the local reference clock is recovered from the Ethernet packet.

    The word can be expanded to make it clearer as shown below.

    The local reference clock or XI CLK is embedded into the transmit network packet traffic and is recovered from the network packet traffic at the receiver node of the link partner.

    Thanks

    David