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Original question:

DP83825I: Pin assignment for LED2 (speed status) in master mode

DP83825I: Slave Mode Oscillator Layout

kz_sk
Intellectual 395 points

Part Number: DP83825I
Other Parts Discussed in Thread: AM4378

Tool/software:

In slave mode, a 50MHz CMOS-level oscillator is connected to the XI pin and also to the MAC's refclk pin.

Are there any layout specifications for this CLK line? I'm curious about the following:

- Should the oscillator be placed closer to the MAC or the PHY?

- Are there any restrictions on the distance between the PHY and MAC?

  • 0
    TI__Guru**** 183751 points

    Hi,

    I would recommend to use a clock buffer, such as CDCLVC1103, to drive the 50MHz separately to the PHY and the MAC. This would minimize the stub and reflection from having to share the clock between the PHY and MAC. 

    With using the clock buffer, you want to keep the entire clock circuit as close to the PHY and the MAC as possible. 

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Intellectual 395 points

    In this case, the PHY and MAC communicate one-to-one. The clock line is also one-to-one.

    The pattern length is about 60 mm.

    The board is 8 layers, allowing for impedance matching.

    I would like to keep costs as low as possible.

    Is a clock buffer necessary?

  • 0 in reply to kz_sk
    TI__Guru**** 183751 points

    Hi,

    I would this recommend to use a clock buffer if it is possible. This would provide a clock to the PHY and the MAC as clean as possible. My biggest concern with sharing the same clock between the PHY and the MAC is the clock signal integrity which could impact PHY's ability to link up or packet loss/corruption due to the poor clock signal quality.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Intellectual 395 points

    When using a clock buffer, is the following configuration OK? The oscillator is near the PHY. The clock buffer is near the MAC. Also, other ICs would be fine, but are there any layout documents for RMII slave mode (refclk output from an external oscillator)? I'd like to use an evaluation board or something similar as reference.

  • 0 in reply to kz_sk
    TI__Guru**** 183751 points

    Hi,

    The 50 MHz Oscillator will feed into the clock buffer, and the multiple buffer output will feed to the PHY and the MAC.

    iIf MAC has a 50MHz CLK output, you could feed it into DP83825 XI in RMII slave mode. You could also configure the PHY into RMII master mode, and then feed PHY CLKOUT into MAC REFCLK input. Both approach would not require a clock buffer. 

    Thanks

    David 

  • 0 in reply to David (ASIC) Liu
    Intellectual 395 points

    Thank you for your reply.
    By the way, is the BIST function effective for verifying communication between PHY and MAC?

  • 0 in reply to kz_sk
    Intellectual 395 points

    By the way, the MAC uses AM4378.

  • +1 in reply to kz_sk
    TI__Guru**** 183751 points

    Hi,

    The BIST function is only for the MDI side. To check the communication between the PHY and the MAC, you can use the PHY MII Loopback. Please check with the AM4378 team on how to support the PHY MII Loopback function.

    Thanks

    David