This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TCAN4550-Q1: Issue with Tcan4x5x Driver

Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TCAN4550

Tool/software:

Hello,

I am currently working with the TCAN4x5x CAN transceiver, which is connected to a T2081 processor via SPI. In my driver code, In my ISR code i cleared the IR (Interrupt Register) at address 0x1050register and checked it is zero . However, after reading the PSR (Protocol Status Register) at address 0x1044(still with in ISR), when read back the IR register it shows 0x20000000(Reserved address access).Why this is happening.

Regards,
Ravindra Arumilli.

  • Hi Ravindra,

    This bit is part of the CAN FD Controller IP called "M_CAN" that is used in the TCAN4550 and developed by Bosch.  The M_CAN User's Manual (Link) provides the following explanation for this bit.

    If you are trying to access an invalid register address or a reserved address, then this bit can be set.  Please verify you are only trying to read or write to a valid register address.

    Regards,

    Jonathan

  • Hi Jonathan,

    Thanks for the reply.

    We are getting this error on a valid register access. The error happens when we read a valid register as part of interrupt processing. In the interrupt handler task (woken up by isr), we first clear IR register. After clearing, we verify that IR is zero. Then we read 10F4 (FIFO status in case of Tx completion) and 1044 (PSR in case of Rx). In either case, immediately after accessing these registers, when we read back IR, it shows 0x20000000. 

    Just to cross check whether it is only the problem with 10F4 or 1044 registers, we read some other registers (for debugging). We get Reserved Address Access error in some registers like 10F8, 1048, 1024, etc. But not when we access registers like 1004, 10C0, 10D0! All these are read operations. 

    The bigger problem is that even if we write back the same value to IR to clear, it does not get cleared. 

  • Hi Ravindra,

    I am unable to replicate the ARA bit getting set while reading the registers you have indicated.  I followed your process of first reading and clearing the interrupt register 0x1050 and then I tried reading these registers and between each register read I read the interrupt register 0x1050 to see if the ARA bit was getting set.  But ARA=0 for all reads of 0x1050.

    Is it possible to log the SPI signals with a logic analyzer to see how the signals are being generated according to our expectations?  Perhaps there is some form of logical error or timing error that is causing the device to se an incorrect address.

    Regards,

    Jonathan

  • Hi Jonathan,

    Enclosed is a capture from the logic analyzer.

    spi read

  • Hi Ravindra,

    If I'm decoding this correctly the MOSI data bytes are: 0x41, 0x00, 0xC4, 0x00, 0xFF, 0xFF, 0xFF, 0xFF

    This would be a SPI Read (0x41) of address 0x00C4, with a Length field of 0x00.

    I see two problems with this.

    1.) There is no defined address of 0x00C4

    2.) The length field should not be 0x00, instead it should be 0x01 because there is only one additional "word" of data (or an additional 32-bits) to be returned before the chip select signal goes high again to end the SPI read transaction.

    There appears to be some error in the driver causing an incorrect bit sequence to be output from the MCU on the MOSI line, which is likely causing the ARA error bit to be set.

    Regards,

    Jonathan

  • Hi Jonathan, 

    Thanks for your continued and immediate support. 

    Sorry for the confusion. The above read was a result of a bad test code we put in while debugging the issue. The enclosed are the images of the IR register (0x1050) read before and after reading register 0x1044. We did three reads immediately after initializing the can device. We did not perform any other operations before testing these reads.  As can be seen immediately after accessing 0x1044 register, the IR register value has change from 0x00000000 to 0x20000000.

    Thanks




  • Hi Ravindra,

    The first plot you loaded has a MOSI value for the first word (32-bits) of 0x41104400.  This is a SPI Read of register 0x1044 with a Length of 0 words because the last byte is a 0x00.  This is incorrect, and the Length field should be 0x01.  So I would expect this to be 0x41104401 for a SPI read of register 0x1044.

    The second and third plots you loaded has a MOSI value for the first word (32-bits) of 0x41105000.  This is a SPI Read of register 0x1050 with a Length of 0 words. Again the Length field needs to be 0x01 for a single register read.  I would expect this to be 0x41105001.

    The plots you shared in your previous post also have an incorrect length field.  Can you please correct the length field and see if this resolves the errors?

    Regards,

    Jonathan

  • Hi Jonathan,

    Thanks a lot for your support. That seems to have solved this issue. Appreciate all your help.

    Ravindra.

  • Hi Ravindra,

    Thanks for letting me know this issue is resolved.  I'm glad I could help.

    Regards,

    Jonathan