DP83869HM: AM6442BSDGHAALV to DP83869HM

AMARNATH G

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869, AM6442

Tool/software:

                ethernetA = &cpsw_port1;
                ethernetB = &icssg1_emac1;
                ethernetC = &icssg1_emac0;
                ethernetD = &icssg0_emac1;
                ethernetE = &icssg0_emac0;
 
         icssg0_eth: icssg0-eth {
                status = "okay";
                compatible = "ti,am642-icssg-prueth";
                pinctrl-names = "default";
                pinctrl-0 = <&icssg0_rgmii1_pins_default>, <&icssg0_rgmii2_pins_default>;
                sram = <&oc_sram>;
                ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>, <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
                ti,iep = <&icssg0_iep0>, <&icssg0_iep1>;
                firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-rtu0-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-txpru0-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-pru1-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-rtu1-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-txpru1-prueth-fw.elf";

                ti,pruss-gp-mux-sel = <2>,      /* MII mode */
                                      <2>,
                                      <2>,
                                      <2>,      /* MII mode */
                                      <2>,
                                      <2>;
                ti,mii-g-rt = <&icssg0_mii_g_rt>;
                ti,mii-rt = <&icssg0_mii_rt>;
                ti,pa-stats = <&icssg0_pa_stats>;
                interrupt-parent = <&icssg0_intc>;
                interrupts = <24 0 2>, <25 1 3>;
                interrupt-names = "tx_ts0", "tx_ts1";
                dmas = <&main_pktdma 0xc100 15>, /* egress slice 0 */
                       <&main_pktdma 0xc101 15>, /* egress slice 0 */
                       <&main_pktdma 0xc102 15>, /* egress slice 0 */
                       <&main_pktdma 0xc103 15>, /* egress slice 0 */
                       <&main_pktdma 0xc104 15>, /* egress slice 1 */
                       <&main_pktdma 0xc105 15>, /* egress slice 1 */
                       <&main_pktdma 0xc106 15>, /* egress slice 1 */
                       <&main_pktdma 0xc107 15>, /* egress slice 1 */
                       <&main_pktdma 0x4100 15>, /* ingress slice 0 */
                       <&main_pktdma 0x4101 15>, /* ingress slice 1 */
                       <&main_pktdma 0x4102 0>, /* mgmnt rsp slice 0 */
                       <&main_pktdma 0x4103 0>; /* mgmnt rsp slice 1 */
                dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
                            "tx1-0", "tx1-1", "tx1-2", "tx1-3",
                            "rx0", "rx1",
                            "rxmgm0", "rxmgm1";
                ethernet-ports {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "okay";
                        icssg0_emac0: port@0 { /* ETH-D */
                                status = "okay";
                                reg = <0>;
                                phy-handle = <&icssg0_phy2>;
                                phy-mode = "rgmii-id";
                                ti,syscon-rgmii-delay = <&main_conf 0x4100>;
                                /* Filled in by bootloader */
                                local-mac-address = [1C 63 49 1A DE 15];
                        };
                        icssg0_emac1: port@1 { /* ETH-E */
                                status = "okay";
                                reg = <1>;
                                phy-handle = <&icssg0_phy1>;
                                phy-mode = "rgmii-id";
                                ti,syscon-rgmii-delay = <&main_conf 0x4104>;
                                /* Filled in by bootloader */
                                local-mac-address = [1C 63 49 1A DE 16];
                        };
                };
        };
        icssg1_eth: icssg1-eth {
                status = "okay";
                compatible = "ti,am642-icssg-prueth";
                pinctrl-names = "default";
                pinctrl-0 = <&icssg1_rgmii1_pins_default>, <&icssg1_rgmii2_pins_default>;
                sram = <&oc_sram>;
                ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>, <&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
                ti,iep = <&icssg1_iep0>, <&icssg1_iep1>;
                firmware-name = "ti-pruss/am64x-sr2-pru0-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-rtu0-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-txpru0-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-pru1-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-rtu1-prueth-fw.elf",
                                "ti-pruss/am64x-sr2-txpru1-prueth-fw.elf";

                ti,pruss-gp-mux-sel = <2>,      /* MII mode */
                                      <2>,
                                      <2>,
                                      <2>,      /* MII mode */
                                      <2>,
                                      <2>;
                ti,mii-g-rt = <&icssg1_mii_g_rt>;
                ti,mii-rt = <&icssg1_mii_rt>;
                ti,pa-stats = <&icssg1_pa_stats>;
                interrupt-parent = <&icssg1_intc>;
                interrupts = <24 0 2>, <25 1 3>;
                interrupt-names = "tx_ts0", "tx_ts1";
                dmas = <&main_pktdma 0xc200 15>, /* egress slice 0 */
                       <&main_pktdma 0xc201 15>, /* egress slice 0 */
                       <&main_pktdma 0xc202 15>, /* egress slice 0 */
                       <&main_pktdma 0xc203 15>, /* egress slice 0 */
                       <&main_pktdma 0xc204 15>, /* egress slice 1 */
                       <&main_pktdma 0xc205 15>, /* egress slice 1 */
                       <&main_pktdma 0xc206 15>, /* egress slice 1 */
                       <&main_pktdma 0xc207 15>, /* egress slice 1 */
                       <&main_pktdma 0x4200 15>, /* ingress slice 0 */
                       <&main_pktdma 0x4201 15>, /* ingress slice 1 */
                       <&main_pktdma 0x4202 0>, /* mgmnt rsp slice 0 */
                       <&main_pktdma 0x4203 0>; /* mgmnt rsp slice 1 */
                dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
                            "tx1-0", "tx1-1", "tx1-2", "tx1-3",
                            "rx0", "rx1",
                            "rxmgm0", "rxmgm1";
                ethernet-ports {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        status = "okay";
                        icssg1_emac0: port@0 { /* ETH-C */
                                status = "okay";
                                reg = <0>;
                                phy-handle = <&icssg1_phy1>;
                                phy-mode = "rgmii-id";
                                ti,syscon-rgmii-delay = <&main_conf 0x4108>;
                                /* Filled in by bootloader */
                                local-mac-address = [1C 63 49 1A DE 17];
                        };
                        icssg1_emac1: port@1 { /* ETH-B */
                                status = "okay";
                                reg = <1>;
                                phy-handle = <&icssg1_phy2>;
                                phy-mode = "rgmii-id";
                                ti,syscon-rgmii-delay = <&main_conf 0x410c>;
                                /* Filled in by bootloader */
                                local-mac-address = [1C 63 49 1A DE 18];
                        };
                };
        };
        icssg1_mdio1_pins_default: icssg1-mdio1-default-pins {
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x015c, PIN_OUTPUT, 0) /* (Y6) PRG1_MDIO0_MDC */
                        AM64X_IOPAD(0x0158, PIN_INPUT, 0) /* (AA6) PRG1_MDIO0_MDIO */
                >;
        };

        icssg0_mdio1_pins_default: icssg0-mdio1-default-pins {
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x0204, PIN_OUTPUT, 0) /* (P3) PRG0_MDIO0_MDC */
                        AM64X_IOPAD(0x0200, PIN_INPUT, 0) /* (P2) PRG0_MDIO0_MDIO */
                >;
        };

        /* ETH-C RGMII pin muxing */
        icssg1_rgmii1_pins_default: icssg1-rgmii1-default-pins{
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x00b8, PIN_INPUT, 2) /* (Y7) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
                        AM64X_IOPAD(0x00bc, PIN_INPUT, 2) /* (U8) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
                        AM64X_IOPAD(0x00c0, PIN_INPUT, 2) /* (W8) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
                        AM64X_IOPAD(0x00c4, PIN_INPUT, 2) /* (V8) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
                        AM64X_IOPAD(0x00d0, PIN_INPUT, 2) /* (AA7) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
                        AM64X_IOPAD(0x00c8, PIN_INPUT, 2) /* (Y8) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */
                        AM64X_IOPAD(0x00e4, PIN_OUTPUT, 2) /* (AA8) PRG1_PRU0_GPO11.PRG1_RGMII1_TD0 */
                        AM64X_IOPAD(0x00e8, PIN_OUTPUT, 2) /* (U9) PRG1_PRU0_GPO12.PRG1_RGMII1_TD1 */
                        AM64X_IOPAD(0x00ec, PIN_OUTPUT, 2) /* (W9) PRG1_PRU0_GPO13.PRG1_RGMII1_TD2 */
                        AM64X_IOPAD(0x00f0, PIN_OUTPUT, 2) /* (AA9) PRG1_PRU0_GPO14.PRG1_RGMII1_TD3 */
                        AM64X_IOPAD(0x00f8, PIN_OUTPUT, 2) /* (V9) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
                        AM64X_IOPAD(0x00f4, PIN_OUTPUT, 2) /* (Y9) PRG1_PRU0_GPO15.PRG1_RGMII1_TX_CTL */
                >;
        };
        /* ETH-B RGMII pin muxing */
        icssg1_rgmii2_pins_default: icssg1-rgmii2-default-pins{
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x0108, PIN_INPUT, 2) /* (W11) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
                        AM64X_IOPAD(0x010c, PIN_INPUT, 2) /* (V11) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
                        AM64X_IOPAD(0x0110, PIN_INPUT, 2) /* (AA12) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
                        AM64X_IOPAD(0x0114, PIN_INPUT, 2) /* (Y12) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
                        AM64X_IOPAD(0x0120, PIN_INPUT, 2) /* (U11) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
                        AM64X_IOPAD(0x0118, PIN_INPUT, 2) /* (W12) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
                        AM64X_IOPAD(0x0134, PIN_OUTPUT, 2) /* (AA10) PRG1_PRU1_GPO11.PRG1_RGMII2_TD0 */
                        AM64X_IOPAD(0x0138, PIN_OUTPUT, 2) /* (V10) PRG1_PRU1_GPO12.PRG1_RGMII2_TD1 */
                        AM64X_IOPAD(0x013c, PIN_OUTPUT, 2) /* (U10) PRG1_PRU1_GPO13.PRG1_RGMII2_TD2 */
                        AM64X_IOPAD(0x0140, PIN_OUTPUT, 2) /* (AA11) PRG1_PRU1_GPO14.PRG1_RGMII2_TD3 */
                        AM64X_IOPAD(0x0148, PIN_OUTPUT, 2) /* (Y10) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
                        AM64X_IOPAD(0x0144, PIN_OUTPUT, 2) /* (Y11) PRG1_PRU1_GPO15.PRG1_RGMII2_TX_CTL */
                >;
        };

        /* ETH-D RGMII pin muxing */
        icssg0_rgmii1_pins_default: icssg0-rgmii1-default-pins{
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x0160, PIN_INPUT, 2) /* (Y1) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0 */
                        AM64X_IOPAD(0x0164, PIN_INPUT, 2) /* (R4) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1 */
                        AM64X_IOPAD(0x0168, PIN_INPUT, 2) /* (U2) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2 */
                        AM64X_IOPAD(0x016c, PIN_INPUT, 2) /* (V2) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3 */
                        AM64X_IOPAD(0x0178, PIN_INPUT, 2) /* (T3) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC */
                        AM64X_IOPAD(0x0170, PIN_INPUT, 2) /* (AA2) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL */
                        AM64X_IOPAD(0x018c, PIN_OUTPUT, 2) /* (Y3) PRG0_PRU0_GPO11.PRG0_RGMII1_TD0 */
                        AM64X_IOPAD(0x0190, PIN_OUTPUT, 2) /* (AA3) PRG0_PRU0_GPO12.PRG0_RGMII1_TD1 */
                        AM64X_IOPAD(0x0194, PIN_OUTPUT, 2) /* (R6) PRG0_PRU0_GPO13.PRG0_RGMII1_TD2 */
                        AM64X_IOPAD(0x0198, PIN_OUTPUT, 2) /* (V4) PRG0_PRU0_GPO14.PRG0_RGMII1_TD3 */
                        AM64X_IOPAD(0x01a0, PIN_OUTPUT, 2) /* (U4) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC */
                        AM64X_IOPAD(0x019c, PIN_OUTPUT, 2) /* (T5) PRG0_PRU0_GPO15.PRG0_RGMII1_TX_CTL */
                >;
        };
        /* ETH-E RGMII pin muxing */
        icssg0_rgmii2_pins_default: icssg0-rgmii2-default-pins{
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x01b0, PIN_INPUT, 2) /* (Y2) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */
                        AM64X_IOPAD(0x01b4, PIN_INPUT, 2) /* (W2) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */
                        AM64X_IOPAD(0x01b8, PIN_INPUT, 2) /* (V3) PRG0_PRU1_GPO2.PRG0_RGMII2_RD2 */
                        AM64X_IOPAD(0x01bc, PIN_INPUT, 2) /* (T4) PRG0_PRU1_GPO3.PRG0_RGMII2_RD3 */
                        AM64X_IOPAD(0x01c8, PIN_INPUT, 2) /* (R5) PRG0_PRU1_GPO6.PRG0_RGMII2_RXC */
                        AM64X_IOPAD(0x01c0, PIN_INPUT, 2) /* (W3) PRG0_PRU1_GPO4.PRG0_RGMII2_RX_CTL */
                        AM64X_IOPAD(0x01dc, PIN_OUTPUT, 2) /* (W4) PRG0_PRU1_GPO11.PRG0_RGMII2_TD0 */
                        AM64X_IOPAD(0x01e0, PIN_OUTPUT, 2) /* (Y4) PRG0_PRU1_GPO12.PRG0_RGMII2_TD1 */
                        AM64X_IOPAD(0x01e4, PIN_OUTPUT, 2) /* (T6) PRG0_PRU1_GPO13.PRG0_RGMII2_TD2 */
                        AM64X_IOPAD(0x01e8, PIN_OUTPUT, 2) /* (U6) PRG0_PRU1_GPO14.PRG0_RGMII2_TD3 */
                        AM64X_IOPAD(0x01f0, PIN_OUTPUT, 2) /* (AA4) PRG0_PRU1_GPO16.PRG0_RGMII2_TXC */
                        AM64X_IOPAD(0x01ec, PIN_OUTPUT, 2) /* (U5) PRG0_PRU1_GPO15.PRG0_RGMII2_TX_CTL */
                >;
        };
&icssg0_mdio {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&icssg0_mdio1_pins_default>;

        icssg0_phy1: ethernet-phy@f {
                reg = <0xf>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
        };

        icssg0_phy2: ethernet-phy@3 {
                reg = <0x3>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
        };
};

&icssg1_mdio {
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&icssg1_mdio1_pins_default>;

        icssg1_phy1: ethernet-phy@f {
                reg = <0xf>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
        };

        icssg1_phy2: ethernet-phy@3 {
                reg = <0x3>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
        };
};
&cpsw3g {
        bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&rgmii1_pins_default>;

        /* Map HW8_TS_PUSH to GENF1 */
        cpts@3d000 {
                ti,pps = <7 1>;
        };
};

&cpsw_port1 {
        status = "okay";
        bootph-all;
        phy-mode = "rgmii-rxid";
        phy-handle = <&cpsw3g_phy0>;
};

&cpsw_port2 {
        status = "disabled";
        bootph-all;
        phy-mode = "rgmii-rxid";
};

&cpsw3g_mdio {
        bootph-all;
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&mdio1_pins_default>;

        cpsw3g_phy0: ethernet-phy@3 {
                bootph-all;
                reg = <3>;
                local-mac-address = [1C 63 49 1A DE 19];
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
        };
};

        mdio1_pins_default: mdio1-default-pins {
                bootph-all;
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
                        AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
                >;
        };

        rgmii1_pins_default: rgmii1-default-pins {
                bootph-all;
                pinctrl-single,pins = <
                        AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */
                        AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */
                        AM64X_IOPAD(0x0150, PIN_INPUT, 4) /* (Y13) PRG1_PRU1_GPO18.RGMII1_RD2 */
                        AM64X_IOPAD(0x0154, PIN_INPUT, 4) /* (V12) PRG1_PRU1_GPO19.RGMII1_RD3 */
                        AM64X_IOPAD(0x00d8, PIN_INPUT, 4) /* (W13) PRG1_PRU0_GPO8.RGMII1_RXC */
                        AM64X_IOPAD(0x00cc, PIN_INPUT, 4) /* (V13) PRG1_PRU0_GPO5.RGMII1_RX_CTL */
                        AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
                        AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
                        AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
                        AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
                        AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
                        AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
                >;
        };

ETHERNET MAC SCHEMATIC.pdf

ETHERNET PHY SCHEMATIC.pdf

Hello TI,

We are using AM6442BSDHAALV as the processor (MAC) and DP83869HM as PHY.

In our design we have 5 Ethernet ports connected from AM6442BSDGHAALV to DP838369 and then to the RJ45 with Inbuilt Magnetics. We are sharing 3 MDC, MDIO lines with 5 DP83869 PHY. RGMII Interface connectivity block diagram is attached for your reference.

The block diagram for the MDC/MDIO interface is also attached for your reference.

Our operating mode is RGMII to Copper (1000 BASE-T, 100 BASE-TX, 10 BASE-TE).

The problem statement is, with the above configuration we are facing the Ethernet Link Instability issue, which means the Ethernet Link is down and up often and randomly. Hereby attaching the Debug logs for your reference.

Also attaching the Device Tree configuration for your reference.

Note: We are facing the Link Instability issue (i,e.: Link Down / Link Up) in ICSSG0 & ICSSG1 Core only.

Can you please help us to proceed further.

Thank you.
Regards
Amarnath G

1 month ago

0 Gerome Cacho 1 month ago

TI__Mastermind 40275 points

Hi Amarnath,

Please note I am a hardware expert for Ethernet devices, not necessary for AM64/device tree debugging. If this thread goes in that direction, I can pull in the necessary folks to assist.

For my understanding, 3/5 ports are working as expected. This leads me to question what could be the difference in hardware between the ports? Also how are you determining intermittent link drop? Is Reg 0x1 or LED0 of the device showing such behavior? What is the link partner of these two problematic ports? Is it showing on all link partners and cables?

Sincerely,

Gerome

0 AMARNATH G 1 month ago in reply to Gerome Cacho

Intellectual 265 points

Hi Gerome,

Thanks for the prompt response.

Please find my response in Bold.

For my understanding, 3/5 ports are working as expected. This leads me to question what could be the difference in hardware between the ports?

Ans: No, only 1/5 ports are working as expected. There is no Hardware Difference between the ports. One potential difference is that Eth-A is connected to the CPSW3G Core, Eth-B&C are connected to ICSSG1 core & Eth-D&E are connected to the ICSSG0 core of AM6442 Processor.

Also how are you determining intermittent link drop?

Ans: We are determining it through the Debug log; there we are able to see that Eth-B Link Down & Link Up very frequently & Eth-C, D & E Link Down & Up occasionally.

Is Reg 0x1 or LED0 of the device showing such behavior?

Ans: We did not observe the Reg 0x1 or LED0, but we are confirming the Link Down and Link as per the Debug log. Below is the Debug log for your reference.

What is the link partner of these two problematic ports?

Ans: Link Partners of all 5 Ethernet ports are PC which has PCIe Ethernet Card with 5 Ports.

Is it showing on all link partners and cables?

Ans: Yes, it is showing on all link partners and cables.

Note: Yesterday we tried to increase the Drive Strength from 75 Ohm to 35 Ohm via the register 0x170h. Now after setting the register 0x170h to 0C00 we did not observe any intermittent link drop issue, but we are facing the Packet loss issue when we try to perform the Ethernet iperf test in UDP format. We are setting all the Ethernet to 1G Speed, and the bandwidth is 5M with this configuration when we perform the iperf test as our Board as Server and the PC as Client we see a packet loss of up to 5%. Can you please help us on that as well.

Thank you.
Regards
Amarnath G

0 Gerome Cacho 30 days ago in reply to AMARNATH G

TI__Mastermind 40275 points

Hi Amarnath,

Reconfiguring Reg 0x170 would alter the MAC impedance of the RX lines for RGMII; it should have no bearing on MDI link. I think it would be important to understand how your SoC is reporting link down, as it is unclear if the PHY is at fault or if the MAC has some issues. Please look to evaluate Reg 0x1 and LED0 across all ports to confirm if this is a PHY-facing issue.

Sincerely,

Gerome

0 AMARNATH G 29 days ago in reply to Gerome Cacho

Intellectual 265 points

Hi Gerome,

During the Link Down report and when we read the Register 0x1 the value is 0x796d, and after the particular port Link Up report also the Register 0x1 is 0x796d only.

So, this shows that the Reg 0x1 bit-2 is always High (1) even when the Link down report has occurred. Which indicates the Link status is Up.

Regards
Amarnath G

0 Gerome Cacho 29 days ago in reply to AMARNATH G

TI__Mastermind 40275 points

Hello,

This indicates that SoC is reporting a false link down event. It is recommended to check in with SoC to understand why this is happening. The PHY is performing as expected.

Sincerely,

Gerome

0 AMARNATH G 29 days ago in reply to Gerome Cacho

Intellectual 265 points

Hello Gerome

Yes now we have narrow down the issue, but still can you please help us how to proceed further? Do you have any idea / points to check like what makes SoC to report false link?

Gerome, if possible can we please have a half an hour meeting, which shall help us to explain more things in detail. If you can share us your email id we can setup a meeting based on your availability.This would really help us a lot.

Thanks

Amar

0 Gerome Cacho 29 days ago in reply to AMARNATH G

TI__Mastermind 40275 points

Hello Amar,

Unfortunately, I do not have any more places to check as I am a PHY expert. You would be better served to contact the AM62 team. I can redirect this thread so they can get notice of this thread. Please let me know.

Sincerely,

Gerome

0 AMARNATH G 29 days ago in reply to Gerome Cacho

Intellectual 265 points

Hello Gerome,

Yes please help us to redirect this thread to AM64 team.

But Gerome we still have few queries on the DP83869 PHY Address setting and Fast Link Down. Can you please help us to setup a dedicated half an hour meeting with you.

Thanks

Amar.

0 Gerome Cacho 29 days ago in reply to AMARNATH G

TI__Mastermind 40275 points

Hello Amarnath,

Regarding thread redirection, done.

Regarding queries, let us look to address on this thread, and if we can't address in one to two replies, we can look to setup a meeting sometime next week.

Sincerely,

Gerome

0 AMARNATH G 29 days ago in reply to Gerome Cacho

Intellectual 265 points

Hello Gerome,

That's great, thanks for the quick support.

OK regarding the PHY Address we are setting up the PHY Address using RxD0 pin and RxD1 pin. With these 2 pins we are able to set the PHY address as 3 or F only you can refer to the schematic attached in the initial message of this thread. Now can you please help us on how to set different PHY address other than 3 and F.

Thanks

Amar

0 Gerome Cacho 29 days ago in reply to AMARNATH G

TI__Mastermind 40275 points

Hi Amar,

To get other addresses, please manipulate R123, 103, and 104 referring to 4-level strap resistor table. PHY addresses are set via bootstrap only. The bootstrap is working as designated as RX_D0 is pulled high via 2.49k, leading to ID 3.

Sincerely,

Gerome

0 AMARNATH G 29 days ago in reply to Gerome Cacho

Intellectual 265 points

Hi Gerome,

Now to get the PHY Address as "C" if I pull low the RxD0 pin by unmounting the resistor R122 and mounting the Resistor R103 and pulling high the RxD1 pin by mounting the Resistor R123 will the PHY Address set to "C"?

Thanks

Amar

0 AMARNATH G 29 days ago in reply to AMARNATH G

Intellectual 265 points

Hi Gerome,

The other major query what we are facing is the Ethernet packet loss issue of up to 5%. When we try to perform the Ethernet iperf test in UDP format we are setting all the Ethernet to 1G Speed, and the bandwidth is 5M with this configuration when we perform the iperf test on our Board as Server and the PC as Client we see a packet loss of up to 5% on all ports even where the Link is stable and no intermittent link loss. Can you please help us on that as well.

0 Johnson John 28 days ago in reply to AMARNATH G

TI__Intellectual 1170 points

Hi,

The expert is currently out of office until October 14th. Please expect some delay in the response. Feel free to ping this thread if you do not hear back by late next week.

Regards,
Johnson

0 Gerome Cacho 28 days ago in reply to Johnson John

TI__Mastermind 40275 points

Hi Amarnath,

To accomplish address C, RX_D1 shall be set in Mode 4 and RX_D0 shall be set in Mode 1.

Regarding packet loss, what is Reg 0x15 presenting after seeing packet loss? This will indicate whether or not the PHY's MDI is contributing to the issue.

Sincerely,

Gerome

0 AMARNATH G 11 days ago in reply to Johnson John

Intellectual 265 points

Hi Johnson,

Any update on this ticket? We are still facing the same issue. Can you please expedite this ticket.

0 AMARNATH G 3 days ago in reply to AMARNATH G

Intellectual 265 points

Hi Gerome/Johnson,

When we moved the Eth-B from ICSSG core to the CPSW Core we did not encounter any Ethernet Intermittent link status. But when the Eth-B is connected to the ICSSG0 we encounter the Ethernet Intermittent link status.

Can we please get some update on the above issue?

0 AMARNATH G 3 days ago in reply to Johnson John

Intellectual 265 points

Hi Johnson John can you please expedite this ticket.

0 Nick Saulnier 1 day ago in reply to AMARNATH G

TI__Guru** 103210 points

Hello Amarnath,

Apologies for the delayed responses here.

Link up/down behavior

1) What version of Linux / Linux SDK are you using?

2) Where are you getting this Linux? (e.g., using TI's SDK or ti-linux-kernel, mainline Linux, or something else?)

There is an errata about MDIO on AM64x potentially getting link downs (errata i2329). But the workaround that fixes the errata is enabled by default in TI Linux SDKs 8.5 and later.

In SDK 11.0, I confirmed by checking the driver code:

arch/arm64/boot/dts/ti/k3-am64-main.dtsi
                icssg1_mdio: mdio@32400 {
                        compatible = "ti,davinci_mdio";

drivers/net/ethernet/ti/davinci_mdio.c
        if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
                const struct soc_device_attribute *soc_match_data;

                soc_match_data = soc_device_match(k3_mdio_socinfo);
                if (soc_match_data && soc_match_data->data) {
                        const struct k3_mdio_soc_data *socdata =
                                                soc_match_data->data;

                        data->manual_mode = socdata->manual_mode;
                }
        }

        if (data->manual_mode)
                data->bus = alloc_mdio_bitbang(&data->bb_ctrl);
...

static const struct k3_mdio_soc_data am65_mdio_soc_data = {
        .manual_mode = true,
};

static const struct soc_device_attribute k3_mdio_socinfo[] = {
        { .family = "AM62X", .data = &am65_mdio_soc_data },
        { .family = "AM64X", .data = &am65_mdio_soc_data },

Ethernet packet loss

Please attach the terminal commands you are using to test. Please also include ethtool -S.

Regards,

Nick

0 AMARNATH G 20 hours ago in reply to Nick Saulnier

Intellectual 265 points

Hello Nick,

Please find my inline response in Bold:

1) What version of Linux / Linux SDK are you using?
Ans: The Linux version we are using is 10.00.07.04.

2) Where are you getting this Linux? (e.g., using TI's SDK or ti-linux-kernel, mainline Linux, or something else?)
Ans: We are getting the Linux from TI SDK.

There is an errata about MDIO on AM64x potentially getting link downs (errata i2329). But the workaround that fixes the errata is enabled by default in TI Linux SDKs 8.5 and later.

In SDK 11.0, I confirmed by checking the driver code:
Ans: We have verified the Errata implementation in our SDK with your help on the below thread.
AM6442: Support on implementing work around for errata i2329 - Processors forum - Processors - TI E2E support forums

Ethernet packet loss

Please attach the terminal commands you are using to test.
Ans: We are performing the Ethernet Packet Loss through third part network testing tool iperf3. Below are the iperf3 Commands used for testing.
To run as Server: iperf3 -s -B 10.10.1.100 -i 1 (10.10.1.100 is the Static IP set to Ethernet Port, Here Server is our Custom Board with AM64xx).
To run as Client: iperf3 -c 10.10.1.100 -u -B 10.10.1.1 -b 5M -t 61200 -i 1 (Here Client is Windows PC).

Please also include ethtool -S.
Ans:

ethtool  ethb
Settings for ethb:
        Supported ports: [ TP    MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Supported pause frame use: Symmetric
        Supports auto-negotiation: Yes
        Supported FEC modes: Not reported
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Advertised pause frame use: Symmetric
        Advertised auto-negotiation: Yes
        Advertised FEC modes: Not reported
        Link partner advertised link modes:  10baseT/Half 10baseT/Full
                                             100baseT/Half 100baseT/Full
                                             1000baseT/Half 1000baseT/Full
        Link partner advertised pause frame use: Symmetric Receive-only
        Link partner advertised auto-negotiation: Yes
        Link partner advertised FEC modes: Not reported
        Speed: 1000Mb/s
        Duplex: Full
        Auto-negotiation: on
        master-slave cfg: preferred slave
        master-slave status: slave
        Port: Twisted Pair
        PHYAD: 3
        Transceiver: external
        MDI-X: Unknown
        Supports Wake-on: ubgs
        Wake-on: d
        SecureOn password: 00:00:00:00:00:00
        Current message level: 0x000020f7 (8439)
                               drv probe link ifdown ifup rx_err tx_err hw
        Link detected: yes
        
        
         ethtool -S ethb
NIC statistics:
     p0_rx_good_frames: 612
     p0_rx_broadcast_frames: 300
     p0_rx_multicast_frames: 0
     p0_rx_crc_errors: 0
     p0_rx_oversized_frames: 0
     p0_rx_undersized_frames: 0
     p0_ale_drop: 0
     p0_ale_overrun_drop: 0
     p0_rx_octets: 102426
     p0_tx_good_frames: 3962281
     p0_tx_broadcast_frames: 3
     p0_tx_multicast_frames: 31
     p0_tx_octets: 1624190877
     p0_tx_64B_frames: 644
     p0_tx_65_to_127B_frames: 68
     p0_tx_128_to_255B_frames: 33
     p0_tx_256_to_511B_frames: 213
     p0_tx_512_to_1023B_frames: 0
     p0_tx_1024B_frames: 3961935
     p0_net_octets: 1624293303
     p0_rx_bottom_fifo_drop: 0
     p0_rx_port_mask_drop: 0
     p0_rx_top_fifo_drop: 0
     p0_ale_rate_limit_drop: 0
     p0_ale_vid_ingress_drop: 0
     p0_ale_da_eq_sa_drop: 0
     p0_ale_block_drop: 0
     p0_ale_secure_drop: 0
     p0_ale_auth_drop: 0
     p0_ale_unknown_ucast: 0
     p0_ale_unknown_ucast_bytes: 0
     p0_ale_unknown_mcast: 0
     p0_ale_unknown_mcast_bytes: 0
     p0_ale_unknown_bcast: 0
     p0_ale_unknown_bcast_bytes: 0
     p0_ale_pol_match: 0
     p0_ale_pol_match_red: 0
     p0_ale_pol_match_yellow: 0
     p0_ale_mcast_sa_drop: 0
     p0_ale_dual_vlan_drop: 0
     p0_ale_len_err_drop: 0
     p0_ale_ip_next_hdr_drop: 0
     p0_ale_ipv4_frag_drop: 0
     p0_tx_mem_protect_err: 0
     p0_tx_pri0: 3962281
     p0_tx_pri1: 0
     p0_tx_pri2: 0
     p0_tx_pri3: 0
     p0_tx_pri4: 0
     p0_tx_pri5: 0
     p0_tx_pri6: 0
     p0_tx_pri7: 0
     p0_tx_pri0_bcnt: 1624190877
     p0_tx_pri1_bcnt: 0
     p0_tx_pri2_bcnt: 0
     p0_tx_pri3_bcnt: 0
     p0_tx_pri4_bcnt: 0
     p0_tx_pri5_bcnt: 0
     p0_tx_pri6_bcnt: 0
     p0_tx_pri7_bcnt: 0
     p0_tx_pri0_drop: 0
     p0_tx_pri1_drop: 0
     p0_tx_pri2_drop: 0
     p0_tx_pri3_drop: 0
     p0_tx_pri4_drop: 0
     p0_tx_pri5_drop: 0
     p0_tx_pri6_drop: 0
     p0_tx_pri7_drop: 0
     p0_tx_pri0_drop_bcnt: 0
     p0_tx_pri1_drop_bcnt: 0
     p0_tx_pri2_drop_bcnt: 0
     p0_tx_pri3_drop_bcnt: 0
     p0_tx_pri4_drop_bcnt: 0
     p0_tx_pri5_drop_bcnt: 0
     p0_tx_pri6_drop_bcnt: 0
     p0_tx_pri7_drop_bcnt: 0
     rx_good_frames: 1976862
     rx_broadcast_frames: 0
     rx_multicast_frames: 7
     rx_pause_frames: 0
     rx_crc_errors: 0
     rx_align_code_errors: 0
     rx_oversized_frames: 0
     rx_jabber_frames: 0
     rx_undersized_frames: 0
     rx_fragments: 0
     ale_drop: 0
     ale_overrun_drop: 0
     rx_octets: 2953184783
     tx_good_frames: 254
     tx_broadcast_frames: 88
     tx_multicast_frames: 0
     tx_pause_frames: 0
     tx_deferred_frames: 0
     tx_collision_frames: 0
     tx_single_coll_frames: 0
     tx_mult_coll_frames: 0
     tx_excessive_collisions: 0
     tx_late_collisions: 0
     rx_ipg_error: 0
     tx_carrier_sense_errors: 0
     tx_octets: 42377
     tx_64B_frames: 288
     tx_65_to_127B_frames: 45
     tx_128_to_255B_frames: 8
     tx_256_to_511B_frames: 87
     tx_512_to_1023B_frames: 0
     tx_1024B_frames: 1976688
     net_octets: 2953227160
     rx_bottom_fifo_drop: 0
     rx_port_mask_drop: 0
     rx_top_fifo_drop: 0
     ale_rate_limit_drop: 0
     ale_vid_ingress_drop: 0
     ale_da_eq_sa_drop: 0
     ale_block_drop: 0
     ale_secure_drop: 0
     ale_auth_drop: 0
     ale_unknown_ucast: 1976855
     ale_unknown_ucast_bytes: 2953183348
     ale_unknown_mcast: 7
     ale_unknown_mcast_bytes: 1435
     ale_unknown_bcast: 0
     ale_unknown_bcast_bytes: 0
     ale_pol_match: 0
     ale_pol_match_red: 0
     ale_pol_match_yellow: 0
     ale_mcast_sa_drop: 0
     ale_dual_vlan_drop: 0
     ale_len_err_drop: 0
     ale_ip_next_hdr_drop: 0
     ale_ipv4_frag_drop: 0
     iet_rx_assembly_err: 0
     iet_rx_assembly_ok: 0
     iet_rx_smd_err: 0
     iet_rx_frag: 0
     iet_tx_hold: 0
     iet_tx_frag: 0
     tx_mem_protect_err: 0
     tx_pri0: 254
     tx_pri1: 0
     tx_pri2: 0
     tx_pri3: 0
     tx_pri4: 0
     tx_pri5: 0
     tx_pri6: 0
     tx_pri7: 0
     tx_pri0_bcnt: 42377
     tx_pri1_bcnt: 0
     tx_pri2_bcnt: 0
     tx_pri3_bcnt: 0
     tx_pri4_bcnt: 0
     tx_pri5_bcnt: 0
     tx_pri6_bcnt: 0
     tx_pri7_bcnt: 0
     tx_pri0_drop: 0
     tx_pri1_drop: 0
     tx_pri2_drop: 0
     tx_pri3_drop: 0
     tx_pri4_drop: 0
     tx_pri5_drop: 0
     tx_pri6_drop: 0
     tx_pri7_drop: 0
     tx_pri0_drop_bcnt: 0
     tx_pri1_drop_bcnt: 0
     tx_pri2_drop_bcnt: 0
     tx_pri3_drop_bcnt: 0
     tx_pri4_drop_bcnt: 0
     tx_pri5_drop_bcnt: 0
     tx_pri6_drop_bcnt: 0
     tx_pri7_drop_bcnt: 0

Note: The Ethtool statistic has been captured when there is no packet loss, Since the test is ongoing and kept for 24 hours, we shall send you the updated statistics once the ongoing test is completed.

Thank you.

Interface

Interface forum

DP83869HM: AM6442BSDGHAALV to DP83869HM