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DP83869HM: Recovered clock - SGMII

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869

Hi,

I am planning to use DP83869 PHY in SyncE application. IO_MUX_CFG register allows configuring the recovered clock to be linked to one of the 4 reception channels, I guess the reception channels are 4 Copper pairs. I am also required to support SFP cage. From my understanding, for the SFP cage I will need RGMII-SGMII mode or RGMII-1000-X modes of operation. How recovered clock works in those modes? 

From the following thread https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1480227/dp83869hm-can-we-get-clock-output-that-recovered-from-sgmii-when-dp83869-is-in-rgmii-to-sgmii-bridge-mode I have learned that it is impossible. But it is still not clear to me how it works as the RGMII RX CLK should also outputs recovered clock. What clock does it output in case of RGMII-SGMII mode or in RGMII-1000-X modes?

I have performed the following test - I have configured the CLK_OUTPUT to recovered clock on channel A and compared it with the RX CLK signals and those signals have the same frequency which is not exactly the same frequency as local clock. 

Thanks!

Alexey.