Part Number: HD3SS3220
This is from datasheet:
The HD3SS3220 non-failsafe pins are the following: PORT, ADDR, SDA/OUT1, SCL/OUT2, INT_IN/OUT3, VCONN_FAULT_N, and DIR. If any of these non-failsafe pins are pulled-up to a supply other than VDD5, then VDD5 supply must be powered up before the VCC33 supply as depicted in Figure 6-2. If it is not possible to power up VDD5 before VCC33, then the ENn_CC pin must be held high while both supplies are ramping and then asserted low after both supplies are stable as depicted in Figure 6-3.
However in absolute maximum ratings DIR pin voltage is VCC33 +0.3, so connecting DIR to VDD5 violates maximum rating. If it is connected to VCC33 do I still need to sequence power supplies?
