TCAN4551-Q1: schematic review

Part Number: TCAN4551-Q1


Hi Team,

Could you please help to check the following schematic and share your comments? Is it necessary to add 40M crystal oscillator on TCAN4551-Q1 application? Besides, if we want to read the device ID, any special action need to take or just follow SPI read is okay?

Thanks.

image.png

BRs.

Frank 

  • Hi Frank,

    Is it necessary to add 40M crystal oscillator on TCAN4551-Q1 application?

    Yes you need a crystal or a single-ended clock connected to the OSC1/2 pins.  This clock source directly controls the digital core and the MCAN controller.

    Besides, if we want to read the device ID, any special action need to take or just follow SPI read is okay?

    Once the VSUP and VIO supply rails are on and within the Recommended Operating Range a SPI Read to the Device ID registers can be done.

    I have reviewed the schematic and have the following comments and observations:

    - The minimum value for the VSUP supply is 5.5V, and the device will not operate directly off of a 5.0V supply.  There is an internal 5V LDO that requires some overhead voltage and therefore VSUP must be greater than 5.5V.

    - A series resistor is recommend between the OSC1 pin and the Crystal to help with optimizing the clock circuit for stable operation.  Please also review the TCAN455x Clock Optimization and Design Guidelines Application Report (Link) for more information.  A 0-ohm resistor can be added and then the value changed later based on further optimization testing if necessary.

    - The Decoupling capacitors on VSUP, VIO, and VCCOUT look correct.

    - If the WAKE pin is not used, it must be connected to either GND or VSUP and should not be left floating.

    - There are not any pull-up or pull-down resistors shown.  The nINT and GPO2 pins are open-drain and require a pull-up resistor to VIO.  nWKRQ can be configured to be open-drain that would require a pull-up resistor to VIO.

    - The RST pin is Active-High, so it needs to be held Low for normal operation and only pulsed High to create a Reset Event.

    Regards,

    Jonathan