Part Number: LMH1219
Dear Support Team,
I am currently using the LMH1219 reclocker in my design and observing unexpected behavior on the LOCK_N output.
Test condition:
SDI cable is connected before power-up.
FPGA bank voltage is 2.5 V.
LOCK_N is configured with a 4.3 k pull-up to 2.5 V.
LOCK_N is connected to both an LED indicator circuit and a PolarFire FPGA input (configured as LVCMOS 2.5 V input, no internal pull-up-down enabled).
Observed behavior:
When the board powers up with a valid SDI input connected, the LOCK_N signal goes LOW briefly (LED turns ON), indicating lock. However, after a short period, LOCK_N goes HIGH and remains HIGH (LED turns OFF), even though the SDI cable is still connected and the input signal is stable.
It appears that the device initially detects the lock but then loses it shortly afterward.
Could you please advise on possible reasons for:
LOCK_N asserting momentarily at startup and then de-asserting.
Any configuration, strap settings, or rate-detection considerations that could cause this behavior.
Whether this could be related to signal integrity, input rate mismatch, or the required initialization sequence.
Thank you for your support.
Best regards,
Milan
