Part Number: XIO2001
Hi, I'm trying to understand what is the correct lenght I shall define for the clock feedback trace that connects CLKOUT6 to CLK pin.
In my design, I have the XIO2001. The CLKOUT0 signal is routed to a clock buffer, which has 8 clock outputs.
These 8 clocks are then routed to a connector, which is connected to a backplane that is routed to 8 different slots.
In this case, with what length should I route the feedback trace?
Thanks!