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TMDS1204: HDMI 2.1 4th data lane ibert error

Irfan Shaikh
Intellectual 490 points

Part Number: TMDS1204

Hi Team,

We are testing HDMI 2.1 and we did ibert test to check the data integrity.
I am facing issue in the 4th data lane, while i loop back from TX to RX, 4th data lane will show no link.

Suspecting that the retimer IC is not giving output on OUT_CLKn/p (39,40) as we have connected the output of IC from 39,40 th pin to the FPGA.

Since Mode pin is also PU(1k) so that there is no fan out buffer supported and all 4 data lanes should be output from the retimer IC.

So please let us know why no link is there on 4th lane.

Regards,
Irfan

  • 0
    TI__Guru**** 185551 points

    Irfan

    Are you AC coupling or DC coupling to the FPGA? If AC coupling, please make sure TMDS1204 AC_EN is being pulled high. If DC coupling, please make sure the FPGA has internal 50ohm termination to 3.3V.

    Can you also measure the IN_CLKp/n and share both the IN_CLKp/n and OUT_CLKp/n scope waveform picture with me?

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Intellectual 490 points

    David,

    My RX design is AC coupled and AC_EN pin is pulled high, attached pin strap settings snap shot for your reference.

    Also, we cant measure the the IN_CLKp/n in CRO because it is transceiver data.
    In HDMI 2.1 all 4 data lanes are data not clock so how to probe the data lanes?

    I am unable to identify whether the Re-timer placed in between the data from FPGA to Monitor i.e, (TX) is the issue or the retimer in between the data lanes going to the FPGA (sink).

    Can you please check it?

    Regards,
    Irfan 

  • 0 in reply to Irfan Shaikh
    TI__Guru**** 185551 points

    Irfan

    The strapping resistors are correct. Since this is a RX side design, I would set LINEAR_EN pin to "F". 

    For probing the data, I would use a high impedance scope probe. The purpose is to verify the presence of data, not the data signal integrity.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Intellectual 490 points

    David,

    The ibert test if from TX to RX loop out so i need to verify both the TX and RX lanes.
    How to confirm that the data has passed from the TX re-timer?
    And we also dont have theteh high impedance scope. Please suggest alternate solution

    Irfan

  • 0 in reply to Irfan Shaikh
    TI__Guru**** 185551 points

    Irfan

    TMDS1204 has a SIGDET_OUT indicator. If used, the SIGDET_OUT requires an external pull-up resistor of 10-kΩ or greater. The TMDS1204 waits for a signal on either IN_CLK (if HDMI 1.4 or 2.0) or IN_D2 (if HDMI 2.1). If a valid signal is detected, then TMDS1204 will drive the SIGDET_OUT low. 

    I understand you don't have high impedance differential or single end probe, but the best way is to use a probe to physically probe the TMDS1204 input and output and verify the presence of data.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Intellectual 490 points

    David,

    I probed the SIGDET_OUT by pull up resistor 10k and it goes low when tested in TMDS and when tested in FRL.
    But there is no output in FRL mode in the monitor.

    Regards,
    Irfan

  • 0 in reply to Irfan Shaikh
    TI__Guru**** 185551 points

    Irfan

    Is the TX design the same design as you shared in the other e2e thread? If it is, please see my response on it.

    Can you share your RX side design schematic from the connector to the TMDS1204?

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Intellectual 490 points

    David,

    Please find the attached RX side design from connector to TMDS1204 IC.
    2063.DESIGN2.pdf

    Regards,
    Irfan

  • 0 in reply to Irfan Shaikh
    TI__Guru**** 185551 points

    Irfan

    Looking at the RX side design,

    1. The RX side design uses the same ESD protection diode MG2040MUTAG, which will impact the signal integrity of the HDMI main link.

    2 The RX side design also uses the TXS0104ERUT to level shift between 5V and 3.3V DDC bus. But if you look at the TXS0104ERUT block diagram, you can see it has internal 10k pullup on its A port. This could cause TMDS1204 not able to correctly snoop the DDC bus and always stuck in HDMI1.4 mode.

    Thanks

    David