Part Number: TXU0304
Other Parts Discussed in Thread: TXB0304
I raised this question a while ago and heard only that TI was investigating. The thread is now locked and there was no reply...
"In the datasheet for the TXU0304 specific mention is made of isolation between power domains when turning the part partially off.
"9.3.5 VCC Isolation and VCC Disconnect
The outputs for this device are disabled and enter a high-impedance state when either supply is <100 mV or left floating (disconnected), with the complementary supply within recommended operating conditions. It is recommended that the inputs are kept low before floating (disconnecting) either supply.
"What is the effect of an input being high when the domain to which it is associated is turned off? Does it make a difference if the high GPIO falls with the supply voltage rail?"
...and I had a follow-up comment...
"Additionally, does it make difference to the recommended operating conditions if the OE pin is taken low but an input is still high when the associated power domain switches off?"
Our testing indicates there is no effect, but we may not be covering all cases and there may be internal states that we cannot anticipate.
Nevertheless, we are trying to bring all inputs low. Does it have to be all inputs, no matter which side of the buffer, or only the inputs on the side that is having power removed?
