XIO2001: CLK6 Feedback Length on a Module Design

Diego Machado

Part Number: XIO2001

Hello,

We're developing a card which is part of a system in wich there is a module (controller) containing the XIO2001 bridge and it is connected on a backplane with other 5 modules (peripherals).

The XIO2001 clock outputs are routed on the controller from the bridge to the connector with low skew.

Through the backplane, the point-to-point clocks are routed to all the modules with low skew, and inside the peripheral modules, the clock lengths are all the same.

The question that rises is the following:

What shall be the feedback from CLK6 to CLK pin in the controller module in this case?

Thanks!

Best regards,

Diego.

30 days ago

0 Diego Machado 30 days ago

Prodigy 40 points

In the question, I meant: What shall be the length of the feedback trace from CLK6 to CLK pin in the controller module in this case?

0 Charles 30 days ago in reply to Diego Machado

TI__Expert 5702 points

Hi Diego,

From 9.2.1.2 of the datasheet, "Feedback clock from CLKOUT6 should be slightly longer than the longest CLK provided to a downstream device."

Please see this thread for some more clarification:

XIO2001: the specific value of "slightly longer" in XIO2001 Implementation Guide

Best,

Charles

0 Diego Machado 29 days ago in reply to Charles

Prodigy 40 points

Hi Charles,

The reference attached doesn't answer my question.

In my system, the backplane trace length is not defined, so there's no way of defining the "longest CLK provided to a downstream device".

The total length of each clock is comprised of: TotalCLKLength_n = length(my_module) + length(backplane_trace_n) + length(peripheral_n)

The only lengths I know for sure are: length(my_module) and length(peripheral_n), which is fixed for all peripherals.

In this case, what is the correct approach? Thanks!

0 Charles 28 days ago in reply to Diego Machado

TI__Expert 5702 points

Hi Diego,

Is your use case a PCI socket? According to the datasheet, "There is one exception to this length matching rule associated with connecting a CLKOUT signal to PCI socket. For this case, the CLKOUT signal connected to a PCI socket should be 2.5 inches shorter than the other CLKOUT signals".

Best,

Charles

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XIO2001: CLK6 Feedback Length on a Module Design