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TCA6416: About I2C Spec of TCAL6416

Part Number: TCA6416
Other Parts Discussed in Thread: , TCAL6416

Hello experts,

I'd like to know about I2C spec of TCA6414.

If I use the TCA6416 as I2C Bus standard mode(frequency is 100kHz), my understanding is the I2C serial-data setup time is 250ns as recieve spec of TCA6416. If the case of TCA6416 sending, which is the sending spec between CLK and DATA? How much max delay from CLK up edge to DATA output?

Best regards,

Masaharu UCHIYAMA 

  • Hi Uchiyama-san,

    I would consider using the TCA6416A as the p2p replacement device to the TCA6416. 

    If you are considering the TCA6416A or TCAL6416, both devices follow the I2C spec. 

    When reading from the TCA6416A or TCAL6416, both will shift data out onto SDA during the low period of the clock SCL. This is defined by the tSDS spec. The TCA device will ensure that the data is changed >tSDS(min) before 30% of the rising edge of the clock signal. 

    Regards,

    Tyler

  • Hell Tyler,

    Thank you for your reply.

    I understand your answer. And I have more question below.

    The case of writing to the TCAL6416, which spec do I  need to protect?

    How much period should I output the data before the rising edge of the clock signal?

    Best Regards,

    Masaharu UCHIYAMA

  • Hi Uchiyama-san,

    The case of writing to the TCAL6416, which spec do I  need to protect?

    How much period should I output the data before the rising edge of the clock signal?

    You would need to adhere to all timing specs within the I2C spec. 

    I think more specifically when writing from MCU --> TCAL6416, the setup and hold timing is most critical. Both data and clock signal come from the MCU in a write transaction. ACK bit is only from TCAL6416 --> MCU on the 9th clock edge for a write transaction. 

    Please see the timing specs of the I2C spec, page 44. 

    https://www.nxp.com/docs/en/user-guide/UM10204.pdf

    Regards,

    Tyler

  • Hello Tyler,

    Thank you for your reply.

    I understand your answer. And I have more question below?

    1) According to the user manual UM10204,

    the case of writing from MCU --> TCAL6416, tVD;DAT is the maximum delay of the data from falling edge of clock signal.

    And the tVD;DAT must be less than half period of the clock period for adhereing the set-up time before it release the data.

    My understanding is correctly?

    2) Is the I2C of TCAL6416 designed follow the UM10204?

    MCU-TCAL6416_I2C_IF.pdf

    Best Regards,

    Masaharu UCHIYAMA

  • Hi Uchiyama-san,

    2) Is the I2C of TCAL6416 designed follow the UM10204?

    yes.

    1) According to the user manual UM10204,

    the case of writing from MCU --> TCAL6416, tVD;DAT is the maximum delay of the data from falling edge of clock signal.

    And the tVD;DAT must be less than half period of the clock period for adhereing the set-up time before it release the data.

    My understanding is correctly?

    Yes. 

    At 100kHz, this is 10 microseconds / clock period. You have max of < 3.45us in standard mode, to change the data after the falling edge of the clock. 

    On your point:

    "And the tVD;DAT must be less than half period of the clock period for adhereing the set-up time before it releases the data..." 

    There is a max spec listed for standard mode, fast mode, and fast mode plus. This is 3.45 us, 0.9us, and 0.45us respectively. 

    Regards,

    Tyler

  • Hello Tyler,

    Thank you for your reply.

    I understand your answer. And I have one more question below.

    1) If I cannot have max of < 3.45 us in standerd mode to change the data after falling edge of the clock, can the TCAL6416 normally perform of the data control?

       If the case of writing from MCA -> TCAL6416, tVD;DAT would be over 3.45 us (Ex) more than 4.2 us ), is there a possibility to not be secured the Spec of data transfer?

    Best regards,

    Masaharu UCHIYAMA

  • Hi Masaharu,

    1) If I cannot have max of < 3.45 us in standerd mode to change the data after falling edge of the clock, can the TCAL6416 normally perform of the data control?

       If the case of writing from MCA -> TCAL6416, tVD;DAT would be over 3.45 us (Ex) more than 4.2 us ), is there a possibility to not be secured the Spec of data transfer?

    This is one of those cases where the definition of the specification can be confusing. The standard lists this 3.45us as a maximum spec. A valid time by its definition is the max time for data settling after a clock drop. As a "MAX" spec, this is the maximum time it would take for data to settle, but the data could settle much sooner. 

    Given a 4.2 us valid timing, this would get more time for settling purposes, so 4.2 us is no issue here. I would make sure that in your timing budget you meet the timing spec on the setup time before the next rising edge of SCL, while maintaining your 4.2 us valid time. 

    You need at least 250 nanoseconds in standard mode for tSU;DAT. 

    Regards,

    Tyler