Part Number: SN65DSI83
We are using RVT101HVDNWC00 this display in our development kit. Also we have are using Quectel SC668S as our main core module. So RVT101HVDNWC00 includes SN65DSI83. And we want CSR values to configure thrrough I2C. This is project is in very critical stage. Please help us ASAP. So i am attaching data sheet and one more document. where i have assumed and generated a document for working display.
DS_RVT101HVDNWC00-B_Rev.1.0.pdf
SC668S_RVT101HVDNWC00-B_Display_BringUp.docx
Hi Prashanth,
Here is a guide on how to download the DSI Tuner Tool to generate the register settings: [FAQ] SN65DSI84: How to configure the SN65DSI84 and SN65DSI85 for single channel DSI to dual channel LVDS
You can use the tool to enter specific config and timings.
Here are the configurations I entered. Note that using DSI clock as input, the DSI clock source (SoC) should transmit DSI clock at the rate shown below, and it should be in HS mode. Please check the datasheet initialization sequence for the register config along with DSI inputs, reset, and enabling output.
As a first step, please use the test pattern config, which will use the DSI clock as source and internally generate an output for the LVDS display. This will confirm that DSI93 bridge and downstream video is working.
/cfs-file/__key/communityserver-discussions-components-files/138/test_5F00_pattern_5F00_CSR_5F00_1280x800_5F00_0818.txt
Is test pattern is confirmed, please use the full CSR register settings for end-to-end video and ensure that the initialization sequence from the datasheet is applied.
/cfs-file/__key/communityserver-discussions-components-files/138/CSR_5F00_1280x800_5F00_0818.txt
Best regards,
Ikram
