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Original question:

TCA9517-Q1: I2C Not Working Properly

TCA9517-Q1: TCA9517-Q1 Rise Time Issue

Mesut KILIÇ
Prodigy 190 points

Part Number: TCA9517-Q1

We had a problem with this i2c buffer.  TCA9517-Q1: I2C Not Working Properly  The system design is here. We have solved this problem. The problem was on the PLL. We are able to work with device at 400 kHz. But I have a question about rise times. When sensor side connected directly to mcu rise time is 230 ns, but when I added i2c buffer rise time at the sensor side is 280 ns. The spec says 300 ns is max. I have 1K2 pull-up res on the host side. without buffer system uses this. with buffer I have added 1K5 pull-up res on the sensor side. If I connect 1K2 pull-up res on the sensor side, rise time will be about 240 ns.

Should I use the i2c buffer on the system? Would it be beneficial in terms of EMC/EMI?

Thanks

mcu_1k2_400.jpg

400 kHz, 1K2, Directly conected to MCU

buffer_1k5_400.jpg

400 kHz, 1K5 with i2c buffer

buffer_1k5_400_zoom.jpg

With buffer Zoom

  • 0
    TI__Intellectual 1735 points

    Hi 

    Our team is OOO today for a national holiday, We will have a response for you by EOD tomorrow, 9/8.

    Thanks,

    Brian

  • 0 in reply to Brian Lin (TXP)
    Prodigy 190 points

    Hi Brian,

    Do you get any response for me from your team?

    Thanks

  • 0 in reply to Mesut KILIÇ
    TI__Intellectual 1735 points

    Hi

    We are still looking into this and will get back shortly.

    Thanks

    Brian

  • 0 in reply to Brian Lin (TXP)
    TI__Guru 65698 points

    Hi Mesut,

    As long as your rise time and cap load are within I2C specifications, I don't see a problem using this buffer. 

    It looks like you have some larger cap loadings in the system due to the longer rise time on the clock pin. However, trise < 300 ns is still okay for I2C standards. 

    Regards,

    Tyler

  • 0 in reply to Tyler Townsend
    Prodigy 190 points

    Hi Tyler,

    Our system can work without the i2c buffer.System described here. 

    Mesut KILIÇ said:
    TCA9517-Q1: I2C Not Working Properly

    We want to use buffer because of our system has 60 cm i2c cable. We had problems on 400kHz I2C before but we have solved it. The problem was on the MCU system clock, not on the i2c buffer.

    My question is do we need the buffer on our system? If we need i2c buffer, what is the benefits for our system? Why we need to use it?

    Thanks

  • 0 in reply to Mesut KILIÇ
    TI__Guru 65698 points

    Hi Mesut,

    I need some more time to respond. 

    Regards,

    Tyler

  • 0 in reply to Tyler Townsend
    TI__Intellectual 1735 points

    Hi Mesut,

    You're seeing two related symptoms with the TCA9517-Q1 buffer at 400 kHz:

    1. Rise time degrades when the buffer is inserted (230 ns → 280 ns with 1.5 kΩ pull-up; improves to ~240 ns with 1.2 kΩ)

    Root Cause #1: Rise Time Degradation

    This is a known, expected behavior — not a device defect. It's the same symptom reported in a resolved E2E case with an identical setup:

    • The TCA9517-Q1 adds input/output capacitance on SDA/SCL (11–13 pF per pin, per the datasheet's electrical characteristics) 
    • Added capacitance + your pull-up resistor = larger RC time constant = slower rise time
    • TI's guidance in that case: "as long as the I2C rise/fall time is within the standard min/max, this is acceptable to use" — and stronger (lower-value) pull-ups are the correct fix, not a sign of malfunction

    Your 1.2 kΩ result (240 ns) is within the 300 ns Fast-mode max spec, so this configuration is electrically compliant.

    Debug step: Use the pull-up sizing app note (SLVA689) to calculate the correct resistor value for your total bus capacitance (board traces + buffer CIO + downstream devices), rather than trial-and-error swapping resistors — referenced repeatedly by TI in this exact class of issue.

    Root Cause #2: Irregular CH2 Signal (sub-1ns edge, non-periodic)

    A signal with <1ns rise time and irregular timing relative to the 400 kHz clock suggests ringing/reflection or a probing/grounding issue, not normal I2C buffer behavior (buffer switching is comparator-based, not sub-ns).

    Debug steps:

    1. Verify probe ground lead length/placement — long ground leads are the most common cause of apparent sub-ns "ringing" artifacts.
    2. Check for bus contention — confirm no B-side ports of multiple TCA9517-Q1 devices are tied together, which causes exactly this kind of erratic behavior.
    3. Confirm the 100 nF decoupling capacitor is placed close to VCCA/VCCB pins per TI's power supply recommendation [4](https://www.ti.com/lit/ds/scps237

    Thanks

    Brian