M-LVDS hot plugging with SN65MLVD040

Hi,

Can you please tell me if the devices are damaged and do not work or if they comeback up after a reset (toggling the enable pins)?

At any point in time during the hot plug does your design violate any of the absolute maximum ratings listed in the data sheet?

Are you power rails stable? The bus pins are in a high impedance state if V_CC <= 1.5V, so after hot plugging the device are your power rails supplying the needed power to the device? 

Are you activating all four channels of the device simultaneously? 

Finally, can you provide some sort of a diagram explaining both A and B from your original post? Your description leaves me with more questions than answers. 

Regards,

Mike

Hi Michael, thanks for your anwer.

0131.MLVDS.pdf

Regarding your questions:

 - The devices are damaged permanently. When I disconnected and connected again the power supply of the main board, that device did not generate the SCK differential signal anymore.

 - Regarding power supply and the possible violation of some absolute maximum ratings, well I don't think so but honestly I'm not sure. For sure not in steady state, but maybe in case that positive (+24Vdc) makes contact before gnd (0V), it could create a dangerous difference of around 24V during some milliseconds.. Notice also that I'm using a non isolated DC-DC switching regulators.

- Regarding the channels, In the master side I've got three of them (SCK, SDO and CS) which are always enabled, all of them are outputs from the master to the bus. SDI is an input from the bus and is enabled by the uC because the SPI bus is shared with an EEPROM and a RTC. In the slaves side, SCK, SDI (master's SDO) and SCK are always enabled as inputs from the bus, while SDO is connected to a "1" and managed through its Drive Enable signal (all the slaves can write to this line, so they leave it in high impedance when not transmitting).

 - I've attached the partial diagrams of both master and slave cards, where you can see the uC, the SPI link with the MLVDS driver and the bus connectors and resistors.

Thanks for your support, best regards

Dear Michael, could you check it?

Thanks, best regards

Hi,

From everything that I have reviewed so far it looks as if you are not doing anything wrong on the SN65MLVD040 side. Every situation that you have shown and described is within the limits of the part. It is OK to keep the communication going while the part is powered down because the inputs go into a high impedance state when the IC is powered down. 

One thing that comes to mind is your ground, you say everything is in the same electrical cabinet/closet but does everything share a common ground or can the ground levels be at different levels? If the ground of your slave is at a lower potential then the ground of your master it could cause a problem? Also, I recommend that you start probing your power supply with a scope when attaching these cards and observe if there is some transient spike of power that is happening. Let me know what happens and I will continue to help you debug.

Were the devices working at one point in time? Is it possible that the IC's were damaged by ESD or something before they were installed? As a last resort we have a failure analysis (FA) process at TI that I can implement but it is a lengthy process and might not yield you a fast answer. 

Regards,

Mike

Hi,

Were you able to isolate your problem? Do you have new questions that I can help with?

Regards,

Mike

Hello Michael,

Sorry for the delayed answer, I couldn't do any further tests because of the limited amount of prototypes, and I'm currently testing other parts of the design. Since we have been assembling these prototypes by hand and there are some wired reworks around this IC, I can't discard any cause. We've decided to order a preseries of these cards and we'll try to do reliability tests as soon as I receive them. I'll inform you in case that the problem remains.

Thanks for your support, best regards

Hello Michael, we are here again..

Althought he problem remains, during the past months we've been producing and installing this product without remarcable incidences because we've avoided hot connection and remarked this point to all our technical staff.

Now we've had some time to analyze it again, with the following conclusions:

Cause:
- The problem happens when, with the power supply switched ON, we connect the flat cable first (differential bus), and later the power connector (+24 / 0 Vdc).
- It does not happen if we do the opposite operation (plug/unplug the communication while the power keeps connected). There's no damage in any card of the system.

Effect:
- In a system with a Master and a Slave node, both cards are damaged. To be precise, after the damage, one of the signal pairs seems to be permanently short-circuited to ground. If we disconnect the card from the system and we "beep" it with the multimeter, we've got real continuity between the bus and gnd! Only the replacement of the IC restores the damaged cards.

Possible solution:
- Assuming that the cause is the different voltage level when hot-plugging the power connector (maybe the positive makes contact before the ground), we've tried to add a GND (0V) through a free line in the flat cable, and it seems to work fine.

Do you think this is a good solution or we could be adding other kinds of problems?

Thanks, best regards

RE: M-LVDS hot plugging with SN65MLVD040