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Hello,
Some questions are below while do PCMCIA measurement and need your support to clarify. Thanks
1. REG # can not measure the change from high to low. And IOIS16 # & WAIT # maintained at high state that has no high to low changed.
Would like to know it is default setting or others?
2. While measuring Td (IORD #) the timing that over spec requirements 100ns. IORD # active low and the time is too short. That looks Incompatible with the spec.
3. IINPACK faster than IORD. Also incompatible with the spec.
However, from the graph can be found in INPACK signals have a significant overshoot. Whether this noise caused INPACK timing mismatch.
What is the solution? For example: add capacitance at the terminal.
4. For Tw (IORD #) the timing, it iis less than spec required minimum 165ns attached waveform as below.
Hello,
Below is customer topology. They would like to know it is reasonable or not for these timing measurement. results. Thanks.
Regards,
Hello Patrick,
The measurements are indeed a little bit out of spec, but it is not clear that the PCI1510 is causing this issue, in order to have a better approach we need the customer to take a scope capture of REG#, CE#, IORD#, INPACK#, IOIS16#, WAIT# because some of these signals (like WAIT# and IOIS16#) are driven by the PC Card.
We are looking for something like the below picture.
Regards.
