• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 32 subscribers
  • Views 326 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Can I get review SERDES interface system configuration?

eric kim
Expert 1400 points
Other Parts Discussed in Thread: DS15EA101, DS15BA101, SN65LV1224B, SN65LV1023A

Hello,

I'd like to use TI SERDES solution that application is Highpass POS system.

The system is composed with all TI as below/attached,

Would you please review a blockdiagram and the schematic whether it is collector or not?

[SERDES Interface Blockdiagram]
1884.SERDES interfcae_blockdiagram.pptx
8360.schematic.pdf
 
•Distance from Target : 40~50m, transmission speed is expected to 500Mbps.
•Interface cable : connected to CAT5e,STP cable.
•Schematic is referred to the Application Note AN-1909.
(DS15BA101 and DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES)
•And referred to DriveCable02EVK User Manual.
•Serializer : DS92LV1023EMQ (TI)
•Deserializer : DS92LV1224TMSA (TI)
•High-speed Differential Buffer : DS15BA101SDE (TI)
•Adaptive Cable Equalizer : DS15EA101SQ(TI)
•Clock Buffer : LMK00105SQE (TI)

Thanks,
eric.