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DS100DF410SQE Design Review

Hoang Manh
Intellectual 380 points
Other Parts Discussed in Thread: DS100DF410

Hi all,

We are going to use the Ti Retimer DS100DF410SQE in our design.

We have FPGA connect with a T5 Chelsio with XFI interface. We place a TI Retimer DS100DF410SQE at Receiver of each side.

Please help us review the schematic, and give feedback if any.

Thanks and Best Regards,
HoangRetimer_Review.pdf

  • 0
    TI__Mastermind 43795 points

    Hi Hoang,

    The base SMBus write address of the external EEPROM must be 0xA0 for the DS100DF410.

    Keep the 22nF capacitors close to the DF410 package.

    Please make sure the DS100DF410 outputs are AC coupled, this is likely on another schematic page.

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Intellectual 380 points
    Hi Lee,

    Thanks for the reply.
    Just one question, in manual of DS100DF410 EVB, it recommended that we have to use EEPROM from Atmel AT24C01/2/4/8B family.
    But Atmel AT24C01/2/4/8B family already End of Life, so we have to chose Atmel AT24C08D to replace.

    We can not sure AT24C08D can work with DS100DF410 Retimer or not? Could you help verify?

    Thanks
    Hoang
  • 0 in reply to Hoang Manh
    TI__Mastermind 43795 points

    Hi Hoang,

    According to the Atmel website, serial EEPROM revisions are designed to replace older devices as long as the electrical specifications still match.  I looked through the datasheets of old and new serial EEPROMs, the biggest difference is that the "D" revision is dropping 5V operation.  This is not an issue in our application since we are working at 2.5V or 3.3V supply.

    Regards,

    Lee