This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TLK10002's UI questions

Other Parts Discussed in Thread: LMK04808, TLK10232, CDCM6208, TLK10002, TLK10031

Hola,

What is the UI?Does it equals to high speed side line rate?

BWT, I have another question is...does it possible feedback CLKOUTBP/N to REFCLK0P/N without jitter cleaned component?

  • Hi Jacky,

    The latency for TX data path is 933-973 (4 lanes) = 93.3-97.3ns (full rate 10Gbps). Meanwhile for RX data path is 475-515UI (4 lanes) = 47.5-51.5ns (full rate 10Gbps), these values includes the data path from Low speed side to High Speed side.
    For clocking, connect CLKOUT to REFCLK should work although the recommendation is use a jitter cleaner, this is because the RMS jitter from CLKOUT without a cleaner is about ~3.99ps. Using a jitter cleaner the RMS jitter decreases to ~121fs, this value corresponds to LMK04808. Hence, the we recommend use a jitter cleaner.

    Best Regards,
    Luis Omar Moran
    High Speed Interface
    SWAT Team
  • Hola Luis,

    Thank you very so much for your prompt reply.

    1. Does TLK10232 can use as below?

       TLK10232 CLKOUT --> CDCM6208 --> REFCLK TLK10232

    2. What is the different between TLK10002 and TLK10232?

  • Hola Luis,

    You mentioned that the latency for TX data path is 933-973 (4 lanes) = 93.3-97.3ns (full rate 10Gbps).

    Meanwhile for RX data path is 475-515UI (4 lanes) = 47.5-51.5ns (full rate 10Gbps), these values includes

    the data path from Low speed side to High Speed side.

    Basically, we want to implement transponder application and it will operate at 2.4576G、3.072G、6.144G and 9.8304G.

    We will use TLK10002 or TLK10232 as new project design. If the TLK10031 can be half price of TLK10232 and we will choose TLK10031.

    Below figure is our application...so, our high speed will have 4 different line speeds.

    BTW I need to know that does the UI for latency calculation will change follow by the line rate?

    That means:1/9.8304、1/6.144、1/3.072、1/2.4576ns. Or, will it have different formula to calculate?

    I will use 1:4 mode only and 153.6MHz reference clock.

  • Hi Jacky,

    1. Yes, even this configuration is the recommendation in datasheet for TLK devices.

    2. Basically the TLK10232 is the new generation of the TLK10002, although the TLK10232 has another features such as:

    Supports 10GBASE-KR, XAUI and 1GBASE-KX.

    Attached you will find a quick comparison between both devices.

    TLK10002 vs TLK10232.pdf

    Best Regards,

    Luis Omar Moran

    High Speed Interface

    SWAT Team

  • Hello Jacky,

    You are right. In this case you are going to use the CPRI rates, hence, the formula for 10G General Purpose Mode Latency is:


    TX Data Path ==> 157-187x4 + 166-306 UI = 794-1054 UI ==> If Data Rate is 9.8304, so, Latency = 80.77-107.2ns
    RX Data Path ==> 40-50x4 + 230-1322 UI = 390-1522 UI ==> If Data Rate is 9.8304, so, Latency = 39.67-154.83ns

    I hope this helps.

    Best Regards,
    Luis
  • Hola Luis,

    Great answer and thank you very so much.

    BTW, I have two final questions below:

    1. CPRI --> HS TLK10232 LS --> LS TLK10232 HS --> CPRI?right?

    2. "Does 2.4576G” will be?

       1084 / 2.4576 = 441ns

       1522 / 2.4576 = 619ns

       So, the total delay will be (441 + 619) x 2 = 2120ns for 2 chips?

    Brs

  • Hi Jacky,

    1. Yes, the configuration should be CPRI <==> [HS] TLK10232 [LS] <==> [LS] TLK10232 [HS] <==>CPRI
    2. Yes, you are right, although, these numbers represent no external skew between lanes.

    Regards,
    Luis
  • Hola Luis,
    Great、Clear and helpful. Thank you very so much.
  • Hello Jacky,

    Please let me know if you have further questions.

    Regards,

    Luis