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SN65DSI86: Asking for the SN65DSI86ZQER eDP resolution support

SHH
Mastermind 31446 points
Part Number: SN65DSI86

Hi Team,
Customer would like to use SN65DSI86ZQER and customer has one resolution question.

conditions
1.MIPI-DSI resolution is 1920x1200/60 fps
2. LCM resolution is 2160x1440

Questions:
1. if MIPI-DSI uses 1channel (4 lanes), can SN65DSI86ZQER's eDP output achieve 2160x1440 resolution?

block diagram

Thanks,
SHH

  • 0
    TI__Mastermind 18655 points

    Hello SHH,

    In all applications, the eDP output rate must be less than or equal to the DSI input rate. If the DSI86 supports an input resolution of 2160x1440 using only 4 data lanes will depend on the DSI Clock rate. For example: 

    Stream Bit Rate = PixelClock × bpp

    1. 

    Stream Bit Rate = 186.62 (approx) × 24

    Min Required DSI Clock Frequency = StreamBitRate /

    (Number_DSI_Lanes × 2)

    Min Required DSI Clock Frequency = 4.47/ (4 × 2)

    Min Required DSI Clock Frequency = 560MHz

    2. 

    Stream Bit Rate = 186.62 Mhz × 18

    Min Required DSI Clock Frequency = StreamBitRate /

    (Number_DSI_Lanes × 2)

    Min Required DSI Clock Frequency = 3.35/ (4 × 2)

    Min Required DSI Clock Frequency = 420MHz 

    Regards

  • 0 in reply to Joel Jimenez0
    TI__Mastermind 31446 points

    Hi Joel,

    Could you help review the customer's schematic and provide your comment?

    OSAKA12_MIPI to eDP bridge_20170531-D.zip

    Thanks,

    SHH

  • 0 in reply to SHH
    TI__Mastermind 18655 points
    Handled via email