Hi there,
My customer is using PCA9306 and has a question regarding Vref.
Vref1 would change between 1.8V and 3.1V while Vref2 stays at 3V.
Do you see any issue regarding the changing Vref1? The one I have in my mind is that the transition between the two voltages might cause some error.
Please find the attached picture for your reference. Thank you!
Best regards,
Roy Hsu
Hey Roy,
1) Are you dynamically changing the Vref1 pin like a switch?
If so, may I ask why? I would like to understand the application for changing the reference voltage.
2) In the case where Vref1 is 1.8V, the part will operate normally. However when you change Vref1 to 3.1V you change the reference voltages on the gates of the FETs.
In a normal set up:
The reference voltage the FET gate sees is now Vref1 plus Vth. SDA and SCL uses this reference voltage to turn on and off FETs inside the device. With a larger gate reference voltage, we will see faster transition times.
With the abnormal setup:
We can see here that the voltage reference on the gate is now 3.0V. There is no Vth added to it resulting in a smaller reference voltage on the gate. The other FETs in the device still look at this voltage, however the Vgs will be lower and result in slower transitions when SDA/SCL is pulled low.
I believe the device will still work but the performance won't be as great as the datasheet shows (as this was never spec'd in the datasheet).
3) "The one I have in my mind is that the transition between the two voltages might cause some error."
Are you planning to switch between 1.8V to 3.1V DURING communication? This will greatly affect the switching of the device. When on the 1.8V reference, the device will be able to pull low faster but from 3.1 to 1.8 the device will pull to low slower.
Thanks,
-Bobby
