Hi,
We are using DS90UR910-Q1. We were able to receive input signals from the DS90UR910-Q1 chip, but on probing status pins: LOCK and PASS pin, we are always getting logic '0'.
What is the problem? Could you please help me?
1. LOCK pin (no-24)
LVCMOS, LOCK status output;
LOCK = 1, PLL acquired lock to the reference clock input; DPHY outputs are active
LOCK = 0, PLL is unlocked
2. PASS pin (no-25)
LVCMOS, normal mode status output pin (BISTEN = 0);
PASS = 1: No fault detected on input display timing,
PASS = 0: Indicates an error condition or corruption in display timing. Fault condition occurs if:
1) DE length value mismatch measured once in succession,
2) VSync length value mismatch measured twice in succession,
BIST mode status output pin (BISTEN = 1);
PASS = 1: No error detected,
PASS = 0: Error detected.
Thanks.
Kevin Xiong
