DS32EL0124: CML Input Structure

Keegan Hernandez63

Part Number: DS32EL0124
Other Parts Discussed in Thread: DS32EL0421

We are developing a DAQ module that will use 32 of these chips to deserialize 32 2.5Gbps data streams. The data signal is from a proprietary sensor that doesn't follow any conventional protocol. We choose this chip because it accepts a DC-coupled signal, and has the ability to disable 8b/10b, DC-balance decoder.

The driver in our system is 3.3V LVPECL, so we need to determine how to couple it to the CML receiver of the DS32EL0124.

The datasheet only mentions the chip is "self-biased" internally. This is not really enough information to determine how to best couple an LVPECL source to the DS32EL0124. Actually, it's not really enough to determine how to use it with a CML source either. I understand the DS32EL0124 and DS32EL0421 are designed typically to be used together without any external biasing components.

Is there some internal pull-up mechanism? Could you describe the input structure of the CML receiver for this chip?

Thanks

over 7 years ago

0 Yaser Ibrahim over 7 years ago

TI__Genius 10250 points

Hello,

As you indicated, the the DS32EL0124 and DS32EL0421 are mean to be used together. To use one by itself a lot of details are needed and not all of it is in the datasheet (some are actually proprietary). However, I will look into this and get back to you.

Regards,
Yaser

0 Yaser Ibrahim over 7 years ago in reply to Yaser Ibrahim

TI__Genius 10250 points

Hello,

To interface LVPECL source to DS32EL0124 CML input, you will need level shifting resistive network as detailed in section 3.1 of this app note: www.ti.com/.../scaa056.pdf . To interface a CML source to the DS32EL0124 CML input, you would connect them directly any biasing or termination resistors.

Regards,
Yaser

0 Keegan Hernandez63 over 7 years ago in reply to Yaser Ibrahim

Prodigy 30 points

Hi Yaser,

Thanks so much for getting back to me.

In that App Note, it makes a certain assumption about the input structure of the CML receiver. The design assumes each CML input is like a 50-ohm resistor to VCC.

Do you know if the CML inputs to the DS32EL0124 are the same as this?

The DS32EL0124 shows a simplified diagram that is different from the App Note. Since it's simplified it may not be an accurate representation though.

Additionally, the data sheet mentions input termination is 100-Ohm nominal (Not 50-Ohm). However, the data sheet does not say if that is single-ended or some differential termination.

Any more info to clarify the actual nature of the DS32EL0124 input?

Thanks again.

0 Yaser Ibrahim over 7 years ago in reply to Keegan Hernandez63

TI__Genius 10250 points

Hello Keegan,

The termination at the DS32EL0124 input is 100 ohm differential. The figure in the app note is a single-ended representation.

Regards,
Yaser

0 Keegan Hernandez63 over 7 years ago in reply to Yaser Ibrahim

Prodigy 30 points

Yaser,

Apologizes I'm still not sure I understand. Thanks for your patience.

Does A or B accurately describe the input, or neither ?

Thanks

0 Yaser Ibrahim over 7 years ago in reply to Keegan Hernandez63

TI__Genius 10250 points

Keegan,

It is equivalent to B.

Regards,
Yaser

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DS32EL0124: CML Input Structure