This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB954-Q1: DS90UB954-Q1

Part Number: DS90UB954-Q1
Other Parts Discussed in Thread: DS90UB953-Q1, DS90UB953-Q1EVM,

Hi Team,

According to the DS90UB954-Q1 datasheet – in order to configure the 954/953 to work in single port mode the only way to do it is via the I2C bus (in register RX_PORT_CTL).

Since I do not have the option to control on the I2C bus and I only transfer it between the camera and the host processor I need a way for setting the 954/953 without interfering to the I2C bus.

Can you please suggest how and if it can be done?

Please advise.

Thanks,

Shlomi

 

  • Hello,

    Correct, you will need to enable port forwarding in DS90UB954-Q1 in order to pass data to the CSI-2 Tx port.

    The only way to do this is by accessing I2C register from local I2C bus or remote serializer I2C across the link to serializer.

    You can program 954 registers from 953 I2C interface as long as remote writes to 954 registers is not disabled (0x08[7] = 0 by default).

    Regards,

    Liam

  • Hi Liam,

    To be sure:

    If I want to work with one CSI-2 camera over COAX or STP (as in the image below)-

    Do I have to modify the DS90UB954-Q1 and DS90UB953-Q1 default configuration via their I2C interface (pins 1&2 in the 954, pins 23&24 in the 953) –

    which is the same interface that is used as the Camera I2C Bus?

    Please advise.

    Thanks,

    Shlomi

    DS90UB95x.docx

  • Hi Liam,

    Attached please find my schematics design FPD LINKIII implementation based on TI's DS90UB954-Q1 and DS90UB953-Q1.

    The schematics includes 2 boards: Serializer board (pages 1-2) and Deserializer board (pages 3-4).

    As I describe below-

    The design supposed to support a connection of one CSI-2 Sensor to a host processor over coax cable.

     I would like to get a design review from you as this subject is new to me.

    BTW - Can you share the gerbers files of the DS90UB953-Q1EVM & DS90UB954-Q1EVM?

    Thanks,

    Shlomi

    IR HEAD CAM FPDIII TEST Schematics V0.1 03 05 18.pdf

  • Hello,

    The SoC master for I2C bus typically resides at the deserializer. Typically the camera I2C would be connected directly to the serializer I2C bus and programmed remotely from deserializer. There would be some I2C configuration required of the deserializer to enable the CSI-2 output, however the devices should initialize and establish connection without I2C.

    I don't understand your PDB connection, but for the most part your schematics do follow the recommended application diagram in the datasheet.

    Regards,

    Liam

  • Hi Liam,

    As for the PDB-

    The Idea is to pull PDB high (using Pull-up to 1.8V, R17 and R61 ) after the last rail raises (1.1V).

    It is done using the power good output (open-drain) of the 1.1V regulator.

    To you find it wrong?

    Thanks,

    Shlomi

  • Hello Shiomi,

    Using the power good seems like a good solution to ensure the PDB goes high after the supplies are stable.

    Kind Regards,