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Original question:

DP83620: AM4377 Ethernet packet loss

DP83620: Termination Resistors, clock & driver

PRAHLAD Supeda
Expert 6160 points
Part Number: DP83620
Other Parts Discussed in Thread: AM4377,

Hi,

Customer had put query on AM4377 Ethernet packet loss on e2e - https://e2e.ti.com/support/arm/sitara_arm/f/791/p/675335/2503262#2503262. In continuation to that, following clarifications are needed on DP83620. 

1. DP83620 datasheet says there are integrated termination resistors on RMII RX lines. On TX lines we have used 22ohm termination resistors near processor end. So request you to suggest on whether termination is required on RX lines and the possible value if so.

2. Reference clock out from the Processor, as this should be input to processor (used RMII1_REF_CLK and RMII2_REFCLK pins of processor).

3. Currently we are using DP83848 PHY driver. Is there driver available for DP83620 specifically ?

  • 0
    TI__Mastermind 19780 points
    Hi Prahlad,

    1. The RMII RX lines have a termination integrated into the DP83620. You do not need to add series termination resistors to the RX lines, unless you want the flexibility to increase the resistance to reduce EMI/EMC.

    2. I am not sure what you mean by this. Are you asking which pins should be connected?

    3. If you are asking for a Linux driver, there is not. You should use the generic PHY.c driver.

    Best Regards,
  • 0 in reply to Rob Rodrigues
    Intellectual 680 points
    Hi Rob/Prahlad,

    Thanks for your reply. Please find our comments below.

    1. OK. I hope the termination resistors will be enabled by default, as there is no any information in datasheet on enabling/disabling those resistors. Am I correct ?
    2. As per TRM of AM4377, RMII Reference clock is input to the Processor (ETH1_CLK/ETH2_CLK in schematics). But even though we have configured it as input, we are seeing 50MHz output from this pin. Also, even if we disable this clock through PRCM_CM_CLKOUT1_CTRL register, we could see the clock out from this pin. Are we missing anything here ?
    3. Yes, we are using the generic PHY.C driver. Attached the DTS file with mail. Kindly review.

    Also, we would like to know whether there is any silicon issue with this part (PN: DP83620SQ/NOPB).

    Best Regards,
    Madhusoodana Bairy
    +91-9538618846
  • 0 in reply to Madhusoodana Bairy6
    TI__Mastermind 19780 points
    Hi Madhusoodana,

    1. Yes, they are enabled by default and not adjustable. There are no controls for the user.
    2. I am not sure, i would suggest placing a separate question on the Sitara processor forum about this behavior.
    3. I don't see a DTS file. Did you perhaps send it to Prahlad?

    There are no known silicon bugs with this device. All information in the DS is current.

    Best Regards,