Other Parts Discussed in Thread: DP83848T,
Hi,
We have an issue with the new PHY DP83822I in combination with the older DP83848T PHY. The PHYs try to establish a 100MBit connection, set the link LED for a short time and clear it immediately.
After some investigations we located the issue on the product with the DP83848 PHY. The clock source of the PHY comes from a MEMS oscillator and if we change this MEMS to an crystal oscillator the communication between the two PHYs works fine.
1.) We have read the PHY registers of both PHYs
DP83848:
The PHYSTS register shows a "False Carrier Sense Latch" Bit.
The counter in the FCSCG register (0x14) counts up and the link bit isn't active.
DP83822I:
ANER and ANLPAR Bist are sometimes set.
The 100Base-T4 is shown but never strapped nor set by the register.
FLDS register: Signal/Energy loss and SNR Level Bits are set.
2.) RX_ERR on DP83822I
We have alos done some measurements on the RX_ERR signal on the PHY. During powerup and after reset high the RX_ERR signal is tristate and pulled up on the board. After about 1 to 1.5 seconds the RX_ERR signal is driven high by the PHY for about 3-4 clocks. After that the RX_ERR signal is driven low and never shows an error. Does this signal show an erro or an special powerup sequence? The datasheet has no setailed description of this signal.
MEMs datasheet (SI501FCA48M0000DAGR): http://www.mouser.com/ds/2/368/Si501-2-3-276739.pdf
