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LMH1218: Device Register settings vs. IBIS-AMI model parameter settings: CTLEAdapt

Part Number: LMH1218


I am trying to go from device register settings to simulation ( with equivalent settings)

I notice the IBIS-AMI model only support IN1 so I initialize simulation parameter to use this input.

I’ve looked at the actual register settings on the device and the simulation settings and they are at odds..

For simulation CTLESetting.CTLEAdapt =b01 is apparently a TESTMODE according to TI_LMH1218_IBIS_AMI_User_Guide.pdf but gave me a good simulation eye of course,

The register settings my device set CTLEAdapt=0,

so now in simulation I set CTLEAdapt=b00 and now step thru EQ_Levels and compare results: The eye looks best in pcb simulation at EQ_Level = 2.

 

I am hoping that I'm using doing this as intended and the settings are now equivalent. 

So if I read the simulations correctly we should change device register settings initially EQ_Level = 2 instead of zero.

 

Also, So how do we confirm from device registers that the settings are stable/good and have lowest BER?

 

-JS

 

 

 

 

 

 

 

  • Hi Jay,

    Q1): " I am hoping that I'm using doing this as intended and the settings are now equivalent. 

    So if I read the simulations correctly we should change device register settings initially EQ_Level = 2 instead of zero."

    You are correct in this case you should use an EQ_Level = 2.

    Reg 0x03 provides the gain for the CTLE settings in CTLEAdapt = 0 mode. Default settings for this register is 0x80 to compensate for 20-25 inches of FR4 trace length. However, this is way too much for most applications. In normal lab environment or lab use most people use short SMA cable and thus we have a recommendation for using 0x03 = 0x00 - this provide just a residual gain(about 2-3dB).

    Q2). "Also, So how do we confirm from device registers that the settings are stable/good and have lowest BER?"

    The best way to harvest optimum settings is by reading HEO and VEO registers. Reg 0x03 setting that provides maximum HEO and VEO should be used for the actual device reg 0x03 setting.

    Regards,,nasser

  • Hi Nasser,
    I found page 6 has a translation between Register setting and parameter setting for Reg 0x03
    Set 4.1 Rx model parameters: Register EQ_Level = 0x80 <=> Model EQ_Level = 2
    So this is confusing based on previous default setting of 0x80.... not sure what I'm missing here.
    .... BTW I have only a couple of inches of FR4 between FPGA and LMH1218.
    -Jay S.
  • Hi Jay,

    Reg 0x03 is 8-bits and IBIS-AMI model is mapping these 8-bits into 16 different EQ level settings.

    I am not sure what type of insertion loss your 2-inches of FR4 has but I remember one of your colleagues used 0x00 setting for reg 0x03 and he had more than 0.7UI of HEO and VEO looked fine too. You can use 0x00 setting and then optimize based on your HEO/VEO reading if needed.

    Regards,,nasser