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DS100MB203: Link fails on one TX-RX pair

Part Number: DS100MB203
Other Parts Discussed in Thread: TLK10034

We have written the following registers in ds100:

Register    0x6, Value 0x18
Register    0x8, Value 0xc
Register    0xe, Value 0xc
Register    0xf, Value [0x0]
Register    0x15, Value 0xc
Register    0x16, Value [0x0]
Register    0x17, Value [0xa8]
Register    0x18, Value [0x0]
Register    0x1c, Value 0xc
Register    0x1d, Value [0x0]
Register    0x23, Value 0xc
Register    0x24, Value [0x0]
Register    0x25, Value [0xa8]
Register    0x26, Value [0x0]
Register    0x2b, Value 0xc
Register    0x2c, Value [0x0]
Register    0x2d, Value [0xaa]
Register    0x2e, Value [0x0]
Register    0x34, Value [0xaa]
Register    0x35, Value [0x0]
Register    0x39, Value 0xc
Register    0x3a, Value [0x0]
Register    0x3b, Value [0xaa]
Register    0x3c, Value [0x0]
Register    0x41, Value [0x0]
Register    0x42, Value [0xaa]
Register    0x43, Value [0x0]
Register    0x5e, Value [0x6
Register    0x5f, Value [0xc]
 

The channels CH0, CH2, CH4 and CH6 were up.

When we change the setting of the register 0x5f to 0xfc, the channels CH1 and CH5 are up, but the channels CH3 and CH7 fails.

At the other end both channels are connected to the same device.

What can be the reason?

The datapath is attached herewith.

Thanks,

Ashitha3660.Data_path.pdf

  • Ashitha,

    You will need to program register 0x5E = 0x07 to control the fanout function in register 0x5F[3:2].

    If you have INPUT_EN = 1 (register bits programmed to 11'b) then the MUX should function as to the shortened table below.

    Regards,

    Lee

  • Hello Lee,

    Our requirement is not fan out.

    We want to configure DS100 such that with one setting links SOUTA0,SOUTA1,SIN_A0 and SIN_A1 will be up and with another setting links SOUTB0, SOUTB1, SINB0, SINB1 will be up.

    For this we set  0x5f either as 0x0c 0r as 0xfc.

    With 0x0c, all corresponding channels  SOUTA0,SOUTA1,SIN_A0,SIN_A1 are working. But with the setting 0xfc, only the channel SOUT_B0 and SIN_B0 are working and SOUT_B1 and SIN_B1 are not working.

    Channels B1 and A1 are similar. Why is the link corresponding to B1 failing with the same settings as that of A1?

    Thanks.,

    Ashitha

  • Hi Ashitha,
    I will receive a new MB203EVM to work on this July 10th.
    Regards,
    Lee
  • Hi Ashitha,

    I have programmed a DS100MB203 EVM with pins and with registers to implement these functions.  It is working normally, all the A or B channels are working as expected based on the datasheet table.

    You do seem to be programming several bits in register 0x5E that are not needed to control SEL0/1. 

    0x5E = 0x06  /* Override SEL0 and SEL1 pin control - use SMBus registers

    0x5F = 0xF0  /* SEL0 = 11 and SEL1 = 11 (Selects A inputs and outputs)

    0x5E = 0x06  /* Override SEL0 and SEL1 pin control - use SMBus registers

    0x5F = 0x00  /* SEL0 = 00 and SEL1 = 00 (Selects B inputs and outputs)

    Regards,

    Lee

  • Hello Lee,
    Thank you for the reply.
    I have tried the the suggested settings .
    The link was not stable.
    We have made the following changes in DS100MB203 registers:
    Instead of setting the DEM as '0' dB, we have changed to '-1.5dB', that is 0x26 register->0x01.
    With this setting the link is up and stable.
    When we read the registers of TLK10034 (pl see datapath diagram), adaptive gain control loop lock is lost at times.
    The register 0x1E.0x000F reads 0x5403 instead of 0x5C03. But there are no errors when HS_ERROR_COUNTER 0x1E.0x0010 register is read.After sometime the lock indicator is set.
    What can be the reason for this?
    How will the datapath be affected when the AGC lock is lost?

    Thanks ,
    Ashitha
  • Hi Ashitha,

    I am glad to hear the DEM change is providing some link stability.  Based on that I will close this thread.  I would recommend let us keep a TLK10034 specific thread open so you can get more information on the register and datapath specifics.

    Regards,

    Lee