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We are using Des DS90UR910-Q1 with Ser DS99R421Q . What all are the additional settings required to be configured other than CONFIG[0:1] registers or gpio control .
In our test set up we have configuired I2C reg 0x01 to work in GEN 2 mode . Now lock pin is showing high but no data is received through FPD link even though clock is received . Is there any special setup or configuration to be done to work DES DS90UR910-Q1 to work in GEN 2 mode with Ser DS99R421Q.
Thanks and regards,
Anoop
Hi Davor,
-What is driving DS99R421Q?
DS99R421Q is driven by IMX6D soc through 3 data + 1 clk LVDS. pixcel clock is 9.5 MHz
-Are you sending any data to the serializer?
-Do you see high-speed data coming out of the DS99R421Q?
Yes data is being send through serializer and able to verified through a compatible head up display(Not sure about the HUD speciifcations)
Moreover we are using QNX 7.0 RTOS . NXP iMX6D MIPI-CSI2 driver is provided by QNX itself. This driver is verified by PATGEN at desrializer ( DS90UR910-Q1).
Is there anything special to be done to operate Der - DS90UR910-Q1 to support GEN2 , DS99R421Q 18-bit mode .
Thanks and Regards,
Anoop
Standard VESA video timing is required for the 910 to output. PASS not at HIGH state indicates incorrect timing.