SN65DSI85: Horizontal and vertical sync error on Sn65DSI85

Varun J

Part Number: SN65DSI85

My self Varun,We are using MIPI-LVDS converter, We are able to get RGB strips when test pattern is enabled in DSI tuner tool, but eventually we are not seeing any image without test pattern for this SN65DSI85 bridge. Clock we are getting almost 52MHz at output, and pulse also were generated from RXIN0- RXIN0+ till RXIN3- RXIN3+ . Can can one help out solving issue?

over 6 years ago

0 Varun J over 6 years ago

Prodigy 100 points

7585.sllseb9f.pdf

0 Varun J over 6 years ago

Prodigy 100 points

4721.TST101WSBH-11c.pdf 8053.PCB-BSB4G-V100 SCHEMATIC.pdf 7658.sllseb9f.pdf

0 Ikechukwu Anyiam over 6 years ago in reply to Varun J

TI__Mastermind 35130 points

Hi Varun,

We'll look into this and get back to you soon. In the meantime please go through the steps in the debug guide in this document: www.ti.com/.../slla356.pdf

Regards,
I.K.

0 Ikechukwu Anyiam over 6 years ago in reply to Ikechukwu Anyiam

TI__Mastermind 35130 points

Hi Varun,

Please let me know whether or not you were able to resolve the issue with the above document.

Regards,
I.K.

0 Varun J over 6 years ago in reply to Ikechukwu Anyiam

Prodigy 100 points

No w.r.t above Info still my issue is not solved yet.

0 Varun J over 6 years ago in reply to Varun J

Prodigy 100 points

If required can you Modify my .dsi file correctly and send?

0 Ikechukwu Anyiam over 6 years ago in reply to Varun J

TI__Mastermind 35130 points

Sure, please attach your .dsi file and I will check it with respect to your panel datasheet.

Regards,
I.K.

0 Varun J over 6 years ago in reply to Ikechukwu Anyiam

Prodigy 100 points

I have sent a .dsi file through mail(i-anyiam@ti.com) please check

0 Ikechukwu Anyiam over 6 years ago in reply to Varun J

TI__Mastermind 35130 points

Hi Varun,

Looking at the panel datasheet it looks like the polarity of the Data Enable signal should be positive. Can you try making this change? Other than that the .dsi file looks okay to me. Please let me know if the issue persists after this change.

Regards,
I.K.

0 Varun J over 6 years ago in reply to Ikechukwu Anyiam

Prodigy 100 points

HI,

We have already tried making Data Enable signal positive also, there was no difference. Apart from this where we should try to debug?

0 Ikechukwu Anyiam over 6 years ago in reply to Varun J

TI__Mastermind 35130 points

Hi Varun,

Please confirm the following points for me:

1. You are following the initialization sequence listed in the datasheet. Please post an oscilloscope screen capture. It should look similar to the below, where pink is EN, green is DSICLK, and orange is DSIData. It's important that the DSICLK is in HS and DSIdata is in LP11 before EN is pulled high.

2. The DSICLK from your processor is a continuous clock

Regards,

I.K.

0 Varun J over 6 years ago in reply to Varun J

Prodigy 100 points

HI,
Can you suggest any other thing to Debug.

0 Varun J over 6 years ago in reply to Varun J

Prodigy 100 points

HI Anyiam,
We found no data at output of SN65DSI85, but MIPI data at input end of DSI is Ok in Normal mode. Only in test mode both out put's are fine. How?

0 Ikechukwu Anyiam over 6 years ago in reply to Varun J

TI__Mastermind 35130 points

Hi Varun,

Have you confirmed the points I asked about in my previous post?

Regards,
I.K.

0 Varun J over 6 years ago in reply to Ikechukwu Anyiam

Prodigy 100 points

3583.PCB-BSB4G-V100 SCHEMATIC.pdfHI Anyiam,

I checked above points, one difference is EN pin, we have connected it to Constant supply(vcc), But still RGB strips are shown with test pattern enable from DSI tuner tool.Have you checked our Schematic design attached.

0 Ikechukwu Anyiam over 6 years ago in reply to Varun J

TI__Mastermind 35130 points

Hi Varun,

You need a capacitor or control signal on this pin to correctly implement the initialization sequence. Please see "Reset Implementation" and "Initialization Sequence" on pages 16 and 17 of the datasheet. The initialization sequence is critical for operation of this device so you'll need to find a way to implement it correctly.

Regards,
I.K.

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SN65DSI85: Horizontal and vertical sync error on Sn65DSI85