TMDS181: Address pin (A1) at Pin Strapping mode

Jeb

A0 is a 2 level input pin during I2C address, you need to pull it high using 65K or pull it low, but you should not leave it floating.

Thanks
David

Thanks for the response.

The data sheet states "The TMDS181 local I2C interface is always enabled, but will only be able to overwrite pin strapped features when I2C_EN/PIN is high." So that implies to me that the I2C interface is still usable if I2C_EN/PIN is pulled low.

Also in some register settings the data sheet states "Note: Field is loaded from SWAP/POL pin; Writes are ignored when I2C_EN/PIN = 0" which again indicates that the I2C interface is usable in pin-strap mode but some registers are read-only.

So if I2C_EN/PIN is pulled low and the design needs the "EQ_SEL/A0" unconnected to configure for adaptive EQ operation, is the I2C interface not usable or will the I2C address just not be deterministic? So, could a register be read at all possible addresses and then use the one where the read is acknowledged until the next power cycle?

Thanks

Jeb

The address will be either A1-0, or A1-1 since A0 has weak internal pullup and pulldown, you can read either A1-0 or A1-1 until you have an ACK. I believe it is A1-0 which will return the ACK.

Thanks
David