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TCAN4550-Q1: SPI Communication: SPI Write problems

Part Number: TCAN4550-Q1
Other Parts Discussed in Thread: TCAN4550

I am using one of the TCAN4550 Evaluation modules with a Tiva TM4C1294XL Lauchpad.  I've wired over from SPI1 of the Launch pad over to the J16 header on the eval board.  

I have been successful when conducting SPI readings but the Write operation is not working correctly. I've captured a Write operation on an oscilloscope and have validated that the signal timing and bit order is the same as specified in the datasheet. For the Write test that I have setup, I programmed the TM4C with this simple procedure.

SPI_READ address 0x0808 (Test Register and Scratchpad).  This operation returns 0x0000 0x0002

SPI_WRITE address 0x1018 (CCCR) with 0x0000 0003

SPI_WRITE address 0x0808 with 0xABCD EF12

SPI_READ address 0x0808.  This operation returns 0x0000 0x0002

I was expecting to see 0xABCD EF12.  Address 0x0800 has not been written to but it does not return the value specified in the January 2018 datasheet.  The RESET value for the Modes of Operation & Pin Configuration Register specified by the datasheet is 0xC7004048 where my two evaluation board return 0xC8000468.  Is there a procedure that specifies the steps needed to properly write to all of the registers on this device?

Thank you,

Joe 

  • I'm still having SPI write problems but I found some additional information that will help. I was able to successfully write to the Test Register and Scratchpad when using the procedure documented above. When I first noticed this write problem, I was trying to write to the Modes of Operation and Pin Configuration Register. I updated the procedure above and these are the results that I receive.

    === ORIGINAL PROCEDURE (Works correctly)===
    SPI_READ address 0x0808 (Test Register and Scratchpad). This operation returns 0x0000 0x0000

    SPI_WRITE address 0x1018 (CCCR) with 0x0000 0003

    SPI_WRITE address 0x0808 with 0xABCD EF12

    SPI_READ address 0x0808. This operation returns 0xABCD EF12



    === UPDATED PROCEDURE(Does not Work) ===
    SPI_READ address 0x0808 (Test Register and Scratchpad). This operation returns 0x0000 0x0000

    SPI_WRITE address 0x1018 (CCCR) with 0x0000 0003

    SPI_WRITE address 0x0808 with 0xABCD EF12
    SPI_WRITE address 0x0800 with 0x0844 0666

    SPI_READ address 0x0808. This operation returns 0x000 0000
  • Hi Joe,

    You could have either a hardware or software issue and I need some more information to help figure out what is happening. 

    First, let's check the hardware. 

    What is the supply voltage you are using with the EVM (VBAT or VSUP)?

    What VIO voltage are you using and is it set properly on the LDO selection dip switch?  This should match the Digital IO voltage levels of the TIVA launchpad.  The TCAN4550 can use either the 5V or 3.3V levels.  Are you powering the launchpad from the EVM VIO, and or have you connected the GND's of the launchpad and EVM at a minimum?

    At a minimum you should need a VSUP/VBAT (12V typ) to power the EVM and then connect nCS, SCLK, SDI, SDO, and GND between the EVM and the Launchpad.  VIO and or 5V can also be supplied to the TIVA from the EVM LDO to ensure the voltage levels are proper.

    Now for the software.

    What SPI clock frequency are you trying to use?  (i.e. 100kHz, 1Mhz, 10Mhz?)

    Can you share your byte sequence you are using for the Read and Write functions? 

    For example, to write register 0x0808 you need to write the following byte sequence:

    Write 0x61, 0x08, 0x08, 0x01, 0xAB, 0xCD, 0xEF, 0x12

    0x61 is the write  Op Code. 

    0x08 0x08 is the Register Address to write (starting address if you are writing more than one word)

    0x01 is the number of words to write which in this case is 1 word.

    0xAB, 0xCD, 0xEF, 0x12 is the data word written into the register.

    To Read a register, it is just like a write function with two differences.  The first difference is the Op Code for a read is 0x41 instead of 0x61. And the other difference is that TCAN4550 will write the register contents out to the MCU during the data portion of the write.  Therefore you need to keep the SCLK cycling as if you were writing data.  Essentially you are writing dummy don't care data to the TCAN4550 and sampling the read data from the TCAN4550.

    Write 0x41, 0x08, 0x08, 0x01, 0x00, 0x00, 0x00, 0x00  (Note:  I wrote all 0's during the dummy data write portion when the read data is being received)

    The data read back during the write should look like 0x00, 0x00, 0x00, 0x00, 0xAB, 0xCD, 0xEF, 0x12

    Notice that the first 4 bytes on the Read line are to be discarded and the last 4 bytes are saved as the contents of the register value.

    Please check your hardware configuration and software byte sequence match my examples and provide me the extra information I requested if everything appears to be in order.

    Jonathan

  • Hi Jonathan,

    I've copied and pasted your reply.  See comments below.

    You could have either a hardware or software issue and I need some more information to help figure out what is happening. 

    First, let's check the hardware. 

    What is the supply voltage you are using with the EVM (VBAT or VSUP)?

    What VIO voltage are you using and is it set properly on the LDO selection dip switch?  This should match the Digital IO voltage levels of the TIVA launchpad.  The TCAN4550 can use either the 5V or 3.3V levels.  Are you powering the launchpad from the EVM VIO, and or have you connected the GND's of the launchpad and EVM at a minimum?

    I'm powering the CAN EVM with an external supply set to 7.5V and connecting directly to J8 connector (VSUP).  The VIO dip switch on the CAN EVM is set to 3p3.  Unfortunately I'm not able to power both the CAN EVM and the TIVA board from the same supply due to the input voltage limitation on the TIVA board so the TIVA is being powered through the DEBUG connector that's uses USB power.  The grounds, however, between the two boards are connected. 

     I also have my main prototype board which has one of the TCAN4550 and a TM4C1294 powered off of the same regulator and I'm seeing the same problem with that board as well.

    At a minimum you should need a VSUP/VBAT (12V typ) to power the EVM and then connect nCS, SCLK, SDI, SDO, and GND between the EVM and the Launchpad.  VIO and or 5V can also be supplied to the TIVA from the EVM LDO to ensure the voltage levels are proper.

    Now for the software.

    What SPI clock frequency are you trying to use?  (i.e. 100kHz, 1Mhz, 10Mhz?)

    I was initially testing at 10Hz which works with the SPI Read operation but I slowed it down to 2MHz.  The signals have a little ringing due to the wires connecting the boards but it's not terrible.  When I preform the SPI Read operation, I've testing reading 10 registers continuously and didn't see a "bit flip".

    Can you share your byte sequence you are using for the Read and Write functions? 

    For example, to write register 0x0808 you need to write the following byte sequence:

    Write 0x61, 0x08, 0x08, 0x01, 0xAB, 0xCD, 0xEF, 0x12

    0x61 is the write  Op Code. 

    0x08 0x08 is the Register Address to write (starting address if you are writing more than one word)

    0x01 is the number of words to write which in this case is 1 word.

    0xAB, 0xCD, 0xEF, 0x12 is the data word written into the register.

    To Read a register, it is just like a write function with two differences.  The first difference is the Op Code for a read is 0x41 instead of 0x61. And the other difference is that TCAN4550 will write the register contents out to the MCU during the data portion of the write.  Therefore you need to keep the SCLK cycling as if you were writing data.  Essentially you are writing dummy don't care data to the TCAN4550 and sampling the read data from the TCAN4550.

    Write 0x41, 0x08, 0x08, 0x01, 0x00, 0x00, 0x00, 0x00  (Note:  I wrote all 0's during the dummy data write portion when the read data is being received)

    The data read back during the write should look like 0x00, 0x00, 0x00, 0x00, 0xAB, 0xCD, 0xEF, 0x12

    Notice that the first 4 bytes on the Read line are to be discarded and the last 4 bytes are saved as the contents of the register value.

    Please check your hardware configuration and software byte sequence match my examples and provide me the extra information I requested if everything appears to be in order.

    I don't know if you saw my 2nd reply, but I was able to get the first procedure to work correctly so I'm able to successfully write to the Test Register.   The reason I started working with the Test Register was because I was having problems getting the device to setup correctly.  The main problem that I encountered was trying to write to the setup registers.  (i.e. Device Configuration Register).  I updated my procedure that worked correctly to include a write to the Device Config Register.  This procedure doesn't work.

    Here are the commands that I'm using:

    TEST REGISTER READ:  0x41080801  -->   0x0000 0000

    CCCR REGISTER WRITE:  0x61101801 0x00000003

    DEVICE CONFIG WRITE:  0x61080001 0x08440666

    TEST REGISTER WRITE: 0x61080801  0xABCDEF12

    TEST REGISTER READ:  0x41080801  -->   0x0000 0000

     

    If I remove the DEVICE CONFIG WRITE, this procedure works as expected.  When I try to write to the Device Config Register, I'm not able to write to other registers correctly.  When I try just to write to the Device Config register and then read back the results, the write and read values don't match.

    Other than the CCCR Register, is there any other setting that needs to be updated in order to properly update these protected registers?

    Thanks for the help,


    Joe

     

     

     

     

     

     

  • Hi Joe,

    I think I found the problem, at least as far as it comes to using the EVM in your testing.  The EVM uses the INH pin of the device to control the LDO Enable pin for the VIO channel.  You are setting bit 9 of the configuration register 0x0800 to 1'b1 which disables the INH pin.  There is a pull down resistor on the EVM which holds the line low when the TCAN4550 isn't driving it high. 

    Once you write register 0x0800, the INH pin is disabled, the pull down resistor disables the VIO channel of the LDO which in turn disables the digital interface of the TCAN4550.  The device won't work again until VIO is applied which will require a power cycle since you can't write to any registers without VIO.

    Regards,

    Jonathan

  • Hi Jonathan,

    I've updated the data that is being written into the Device Config from 0x08440666 to 0x08440466 and reran my experiment that I outline on the 25th. I'm still see the same results... As before, if I eliminate the Write to the Device Conf register, the operation works correctly.

    Joe

  • Hi Joe,

    If I understand correctly, this is the sequence you are trying to use:

    TEST REGISTER READ: 0x41080801 --> 0x0000 0000
    CCCR REGISTER WRITE: 0x61101801 0x00000003
    DEVICE CONFIG WRITE: 0x61080001 0x08440466
    TEST REGISTER WRITE: 0x61080801 0xABCDEF12
    TEST REGISTER READ: 0x41080801 --> 0x0000 0000 <-- Should be 0xABCDEF12 if working properly

    And the last read of 0x41080801 still comes back as 0x0000 0000. Is this correct?

    Your sequence appears to work for me initially, although I believe there are still some problems we can correct. Here is the output of my test sequence using my SPI interface tool.

    Write: h41, h08, h08, h01, h00, h00, h00, h00,
    Read: h00, h00, h00, h00, h00, h00, h00, h00,

    Write: h61, h10, h18, h01, h00, h00, h00, h03,
    Read: h00, h00, h00, h00, h00, h00, h00, h00,

    Write: h61, h08, h00, h01, h84, h44, h04, h66,
    Read: h00, h00, h00, h00, h00, h00, h00, h00,

    Write: h61, h08, h08, h01, hAB, hCD, hEF, h12,
    Read: h00, h00, h00, h00, h00, h00, h00, h00,

    Write: h41, h08, h08, h01, h00, h00, h00, h00,
    Read: h00, h00, h00, h00, hAB, hCD, hEF, h12, <-- I am reading the scratch pad register value correctly

    I did notice that you are also writting a 1 to bit 2 of register 0x0800 which is the Device_Reset bit. When you write this bit, the device will reset to the default state. By combining this into your only configuration register write, you are simply resetting the device configuration back to the default state. If you want to do a device reset before the configuration, you need to do a separate write to register 0x0800 with bit 2 set to 1 to default the device. Then do a second write to register 0x0800 with your desired configuration settings.

    However, you should still be able to read and write to the scratch pad register 0x0808 when the device is in it's default power up state. This is what I see and am showing above.

    One of the other things I noticed is that you should clear the Power On Interrupt Flag bit after you power up the device by writing a 1 to bit 20 of register 0x0820. This will prevent the TCAN4550 from entering Failsafe Mode 4 minutes after you have powered up the device. See section 8.4.5 of the datasheet. You are trying to disable the SWE Timer and disable the Failsafe in the Configuration Register 0x0800. But the Power On flag needs to be cleared prior to disabling these features. If the PWRON flag is set, the SWE timer is not disabled and the device will eventually enter sleep through a Failsafe condition. I would suggest always reading and clearing the flags in register 0x0820 at the start of your sequence and after any power up.

    You don't appear to be doing this, but you will want to not write a 1 to the CSA and CSR bits of the CCCR register 0x1018. If you do you will cause the clock to stop and that will cause you problems. Always write 0's to these bits.

    Can you try your sequence by removing the Device Reset and also clearing the Power On flag in the status register to see if that has any impact. Also, double check your results look at mine for any other differences that may help.

    Also, could you read registers 0x0000, 0x0004, and 0x0008 and send me the values? I would like to check which version of the TCAN4550 you are using to make sure there isn't a version related issue with what you are trying to do.

    Regards,
    Jonathan
  • Hi Jonathan,

    From your Reply above...

    If I understand correctly, this is the sequence you are trying to use:

    TEST REGISTER READ: 0x41080801 --> 0x0000 0000
    CCCR REGISTER WRITE: 0x61101801 0x00000003
    DEVICE CONFIG WRITE: 0x61080001 0x08440466
    TEST REGISTER WRITE: 0x61080801 0xABCDEF12
    TEST REGISTER READ: 0x41080801 --> 0x0000 0000 <-- Should be 0xABCDEF12 if working properly

    And the last read of 0x41080801 still comes back as 0x0000 0000. Is this correct? Yes, that's correct.

    That makes perfect senses. I completely misunderstood the meaning of the DEVICE_RESET bit. I interpreted this bit as a setting. When I read this, I thought the part could either bet setup to return to a Default state OR it 's current configuration after a RESET coming from the RST pin. After your explanation, the operation of this bit makes more senses. I will try this first thing Monday morning and let you know what I find and will send you the Part revision.

    Thanks,
    Joe
  • Hi Jonathan,

    The RESET appears to be the problem. I haven't run my full initialization procedure but the simple test we were running, works correctly after I cleared Bit 2.

    Here are the values that I read out of the Device.
    0x0000 0x4E 0x41 0x43 0x54
    0x0004 0x30 0x35 0x35 0x34
    0x0008 0x00 0x11 0x02 0x00

    Thanks for your help,

    Joe