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Original question:

TMDS181: Retimer mode

TMDS181:

Steffen Graessle
Prodigy 120 points
Part Number: TMDS181


Dear TI support team,

I have some questions which concerns the TMDS181. I'm using this chip on the sink side in combination with a Kintex7 FPGA as an HDMI 2.0/1.4 capable receiver. Due to the location of the HDMI-connector, the TMDS181, and the FPGA on the PCB, I have to swap the lanes, and the polarity of the lanes. The question is, how do I have to program the TMDS181 via I²C, in order to achieve HDMI1.4b and HDMI2.0 compliancy:

Questions:

1)  According the datasheet, only the Retimer Mode is possible when I swap the polarity of the lanes. So I assume that I cannot use automatic crossover. Can I use the retimer mode for the full clock range from 250Mbps to 6Gbps? In the datasheet there are inconsistent statements regarding the range. Please compare page 35 (DEV_FUNC_MODE) and page 31 chapter 8.4.1. Please can you clarify this?  

2) Assuming I have to use the retimer mode for the full clock range, could I still achieve HDMI1.4b and HDMI2.0 compliancy?

3) Assuming I have to use the retimer mode for the full clock range, it is not clear to me which sequence I have to program. In one of the other threads (see link below), it is mentoined that you have to set the register DEV_FUNC_MODE to "11", and then do a PD_EN afterwards. But if I do a PD_EN after setting the DEV_FUNC_MODE register, then all I2C registers will be reset to its default value. This means the DEV_FUNC_MODE will be reset to "01" = Automatic redriver to retimer crossover at 1Gbps. This does not sound logical to me. Please can you clarify this?

https://e2e.ti.com/support/interface/f/138/t/736159?tisearch=e2e-sitesearch&keymatch=TMDS181

Best regards

Steffen Gräßle

  • 0
    TI__Guru**** 182851 points
    Steffen

    To switch between HDMI1.4 and 2.0, you may want to consider setting DEV_FUNC_MODE = 10. In DEV_FUNC_MODE = 10: Automatic retimer when HDMI2.0, based on TMDS_CLK_RATIO_STATUS, if DDC train is disabled, TMDS181 doesn't monitor SCL_SNK/SDA_SNK but configures itself according to TMDS_CLK_RATIO_STATUS. Write the right value in TMDS_CLK_RATIO_STATUS, then, toggle PD_EN and TMDS181 will switch between HDM1.4 and HDMI2.0. For TMDS_CLOCK_RATIO_STATUS, this bit needs to be 0 for HDMI1.4 and 1 for HDMI2.0.

    Besides DEV_FUNC_MODE, please also take into account the difference between HDMI 1.4 and 2.0 in terms of TX termination and TMDS_CLOCK_RATIO_STATUS.

    For HDMI1.4b a transmitter termination of 150 Ω to 300 Ω is allowed for data rates above 2 Gbps to compensate for reflections. For HDMI2.0a the 75 Ω to 150 Ω transmitter termination is required and the link will not work if this is not set.

    Thanks
    David
  • 0 in reply to David (ASIC) Liu
    Prodigy 120 points
    Hello David,
    thank you for your response, but I think the discussion is going to the wrong direction. Please see my comments below:

    [David] To switch between HDMI1.4 and 2.0, you may want to consider setting DEV_FUNC_MODE = 10...

    [Steffen] Maybe you didn't noticed that I have to swap the lane polarity due to the given routing on the PCB. As mentoined in the datasheet, when swaping the lane polarity, the redriver mode is not working, or in other words, when you use automatic crossover, the swap polarity register is deasserted automatically when switching from retimer to redriver mode. Please read my first mail carefully to understand my problem. I can not use DEV_FUNC_MODE = 10 ! From my point of view the only way to cover the full clock range is to use the retimer only mode.

    [David] Besides DEV_FUNC_MODE, please also take into account the difference between HDMI 1.4 and 2.0 in terms of TX termination and TMDS_CLOCK_RATIO_STATUS.

    [Steffen] Again, please read my first mail carefully. The TMDS 181 is working on sink side, not on source side. I don't think that the TX termination will have any influence on the HDMI1.4 / 2.0 standards, when the TMDS181 is located on sink side. The schematics for the TMDS181 looks like the schematic which is depicted in the datasheet on page 44, figure 36. Though the TX termination affects only the short transmission between the TMDS181 output and the FPGA input.

    David, with this feedback, please can you try to answer my questions in the first mail.

    Thank you & Best regards
    Steffen
  • 0 in reply to Steffen Graessle
    TI__Guru**** 182851 points
    Steffen

    Yes, to maintain polarity and lane swap capability, you would need to set DEV_FUNC_MODE to b'11.

    But I also want to highlight the key difference between HDMI1.4 and 2.0 in my previous response, which is TX termination and clock output. No termination is defined for HDMI1.4 but termination is defined for HDMI2.0, so when you switching between HDMI1.4 and 2.0, you have to take the termination into account. You also need to take clock status into account as well, otherwise TMDS181 will output wrong clock frequency to the sink.

    Thanks
    David
  • 0 in reply to David (ASIC) Liu
    Prodigy 120 points
    Hello David,
    please see my comments and questions below:

    [David]
    Yes, to maintain polarity and lane swap capability, you would need to set DEV_FUNC_MODE to b'11.

    [Steffen]
    So far I understood that I have to initialize the TMDS181 by using the following programming sequence:
    1) Set DEV_FUNC_MODE = b'11
    2) Set LANE_SWAP = b'1
    3) Set LANE_POLARITY = b'1

    Further, I found the following comment in the datasheet, when using DEV_FUNC_MODE = b'11 :

    11 – Retimer mode across full range 250 Mbps to 6 Gbps
    When changing crossover point, need to toggle PD_EN or toggle external HPD_SNK.

    So beside the initialization sequence I have to toggle the PD_EN for example, whenever the crossover point is exceeded.

    Please can you define what is exactly meant with crossover point?

    Best regards
    Steffen
  • 0 in reply to Steffen Graessle
    TI__Guru**** 182851 points
    Steffen

    11 – Retimer mode across full range 250 Mbps to 6 Gbps
    When changing crossover point, need to toggle PD_EN or toggle external HPD_SNK.

    There should be a space between the two sentences, the crossover is between re-driver and re-timer.

    Thanks
    David
  • 0 in reply to David (ASIC) Liu
    Prodigy 120 points
    Hello David,
    In the datasheet I found the following sentence, regarding the automatic crossover event, when DEV_FUNC_MODE = b'01:

    "The retimer is automatically activated at pixel clock approximately above 100 MHz when jitter cleaning is needed for robust operation when this option is enabled (default)."

    In the text above, a crossover event is detected, when the TMDS clock crosses 100MHz. Is it correct to use just the TMDS clock frequency for comparison, or shouldn't I better use the bitrate 1Gbps for comparison, by considering the TMDS Clock, multiplied with clock ratio (x10, x40), as defined in the TMDS_CLOCK_RATIO_STATUS bit ?

    So, shall I use the measured TMDS-clock frequency, or the measured bitrate, to detect a crossover event?
    Please note that it makes a difference, if we decide for the one or the other.

    Best regards
    Steffen
  • 0 in reply to Steffen Graessle
    TI__Guru**** 182851 points
    Steffen

    TMDS181 uses the TMDS-clock frequency, not the bit rate for the crossover.

    Thanks
    David
  • 0 in reply to David (ASIC) Liu
    Prodigy 120 points
    Hello David,
    okay I understand. I have to monitor the TMDS clock frequency, and when it crosses 100Mhz, I have to toggle PD_EN. So it is clear now how a crossover event is defined.

    I'm just wondering how I can detect a crossover event within the FPGA. Well, the HDMI Receiver Subsystem (IP-core) comes along with corresponding driver files. Within the driver file named xv_hdmirxss.c, I found an API function named XV_HdmiRxSs_RefClockChangeInit(), which is called, whenever the TMDS clock frequency changes. So I could hook in some code here to detect a cross over event. Can you agree, or is there any better way how I can implement the detection of a crossover event?

    Kind regards
    Steffen
  • 0 in reply to Steffen Graessle
    TI__Guru**** 182851 points
    Steffen

    It depends on how the API function XV_HdmiRxSs_RefClockChangeInit() is being implemented, but the general concept is correct.

    Thanks
    David