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Original question:

SN65LVDS93B: what receiver will match full 10MHz to 85MHz operational range

SN65LVDS93B: 1.8V 85MHz LVDS channel link road map consult

Lin_Charles
Expert 4260 points
Part Number: SN65LVDS93B
Other Parts Discussed in Thread: DS90CR288A, DS90CR287, DS90C189-Q1, SN75LVDS83B, SN65LVDS93A

Hi team. My customer wants to replace DS90CR287/DS90CR288A with 1.8V power supply for their FPGA is changed to 1.8 V power supply. Their requirements are below,

  • 1.8V supply;
  • 28 bit to 4 parallel
  • 20 to 85 MHz Shift Clock Support

do we have any device can support above spec? Thanks.

  • 0
    TI__Mastermind 35130 points
    Hi Lin,

    They can use the DS90C189-Q1 for this application. But please note the minimum frequency for this part is 25 MHz so it doesn't exactly meet all their requirements.

    Regards,
    I.K.
  • 0 in reply to Ikechukwu Anyiam
    TI__Expert 4260 points
    Hi Anyiam. Thank you for your help here/ I look into the datasheet of this device. I have below questions,
    1. Why in single pixel input, the bit 20 to bit 18 are placed by DE, VS, HS? How to restore the data on bit 20 to bit 18?Connect bit 20 to DE together?
    2. Do we have any receiver that can be used with DS90C189-Q1?
    3. I am thinking SN75LVDS83B can also be used in this application but no proper receiver? Right?
  • 0 in reply to Lin_Charles
    TI__Mastermind 35130 points
    Hi Lin,

    Good point, the SN65LVDS83B can also be used for this application and is probably the better choice due to its wider frequency range. I forgot that it had 1.8V/3.3V configuration option. You can also consider the SN65LVDS93A for a wider operating temperature range (-40 to 85C).

    For the receiver, you can use the DS90CR288A. Note that it's LVTTL outputs are 3.3V though.

    In regards to your first question, those bits are labeled as such for convenience as they bits are used for DE, VS, and HS in LVDS displays. You can map these inputs however you like though, just note each bit's output on the serial LVDS lanes is fixed. You can view section 1 of this application note for more details about the mapping: www.ti.com/.../snla014a.pdf

    Regards,
    I.K.