DP83640: Register dump for SNLA098A and SNOA548A

Jun Ishida

Part Number: DP83640

Hi team,

The customer is testing with two DP83640-EVMs to achieve IEEE1588 operation. They are referring to software development guide but cannot achieve 1PPS output from GPIO9 in condition of the below connection. The EVM setup is done by Win10 PC via MSP430 Launch Pad (USB to MDIO).

GPS -> EVM-1 -> Ethernet cable -> EVM-2

The customer could change CLK_OUT to 10MHz from 25MHz but they cannot output 1PPS from EVM-1 and EVM-2, respectively.

(1) Could you please provide the register dump of all the settings for both SNLA098A and SNOA548A? They would like to check what their setting is wrong by comparing with the settings of app notes.

(2) As above connections, they don't use MAC layer for the 1PPS transmission in this testing. Do you think the MAC is needed for the 1PPS output from DP83640?

Regards,

Jun

over 6 years ago

0 Jun Ishida over 6 years ago

TI__Expert 5640 points

Hi team,

Could you give us any feedback? Please provide any information to achieve 1PPS transmission without MAC such as the step-by-step register setting.

Regards,
Jun

0 Hung Nguyen92 over 6 years ago in reply to Jun Ishida

TI__Expert 5670 points

Hi Jun,

Follow this link for Software Design Guide and C Software Reference Library: www.ti.com/.../dp83640sw-lib

The software design guide has description on IEEE 1588 configuration and examples.

Regards,

Hung Nguyen

0 Jun Ishida over 6 years ago in reply to Hung Nguyen92

TI__Expert 5640 points

Hi Hung-san,

Thanks for the library information.

Could you tell us whether the 1PPS transmitting/receiving can be achieved without MAC layer, or not?

Regards,

Jun

0 Hung Nguyen92 over 6 years ago in reply to Jun Ishida

TI__Expert 5670 points

Hi Jun,

1PPS can be generated without the MAC layer.

Regards,

Hung Nguyen

0 Jun Ishida over 6 years ago in reply to Hung Nguyen92

TI__Expert 5640 points

Hi Hung-san,

Thank you for your answer. However, we have not yet achieved the operation of 1PPS transmitting and receiving inspite or referring the software development guide. Again, could you please provide the step-by-step configuration or method for the 1PPS generation?

Regards,

Jun

0 Jun Ishida over 6 years ago in reply to Jun Ishida

TI__Expert 5640 points

Hi Hung-san,

The customer can finally transmit the 1PPS signal from DP83640 but they have some cases that the 1PPS can or cannot be output from the PHY. Sorry for rushing you again and again, but please provide us with the step-by-step configuration, the setting sequence or the method for stable 1PPS generation.

Regards,

Jun

0 Jun Ishida over 6 years ago in reply to Jun Ishida

TI__Expert 5640 points

Hi team,

We have not yet obtained the answer from you for the step-by-step configuration, setting sequence or method to generate the stable 1PPS signal without MAC. Please see the attached register settings from the customer and review it to find out any wrong settings or sequence as soon as possible?

DP83640 Setting for sending and receiving 1PPS without MAC_Mar2019.docx

Regards,

Jun

0 Jun Ishida over 6 years ago in reply to Jun Ishida

TI__Expert 5640 points

Hi team,

Could you provide us any feedback or update on this?

Regards,
Jun

0 Hung Nguyen92 over 6 years ago in reply to Jun Ishida

TI__Expert 5670 points

Hi Jun,

As far as PPS generation, it looks okay.

There are lots of discussion about rearm the trigger if there is large adjustment. Refer to this thread for more details: e2e.ti.com/.../531180

Regards,

Hung Nguyen

0 Jun Ishida over 6 years ago in reply to Hung Nguyen92

TI__Expert 5640 points

Hi Hung-san,

Using the settings I attached on the previous thread, we can generate one trigger pulse from GPIO but have not yet generated 1PPS signal. Could you clearly provide us what the wrong settings or sequence are as soon as possible?

Regards,
Jun

0 Ross Pimentel over 6 years ago in reply to Jun Ishida

TI__Mastermind 23675 points

Hi Jun,

Can you please make sure that bit[15:14] are both set in register 0x14.
What is the current value of this register?

0 Jun Ishida over 6 years ago in reply to Ross Pimentel

TI__Expert 5640 points

Hello Ross-san,

I will check the actual values for Reg.0x14 bit[15:14] and get back to you, but could you also let me know what the correct value is for the bit[15:14]?

Regards,

Jun

0 Ross Pimentel over 6 years ago in reply to Jun Ishida

TI__Mastermind 23675 points

Please see page 95 in the DS.
The value in the register depends on what features you want.
Also, please make sure you are on the correct SMI page.
There are multiple 0x14 registers, which is why you need to access the PTP page for 0x14.

0 Jun Ishida over 6 years ago in reply to Ross Pimentel

TI__Expert 5640 points

Hi Ross-san,

PTP_TRIG 0x14 bit[15:14]=10
In this case, DP83640 outputs a pulse when PTP_CTL is set to 0100. This pulse is output at every setting of PTP_CTL=0100.

If the bit[15:14]=11, DP83640 outputs continuous pulse when PTP_CTL is set to 0100.

We don't think above pulse is PPS signal, but how do you think? We would like to get the script file of USB2MDIO board to generate the 1PPS signal from DP83640 without MAC.

Regards,
Jun

0 Jun Ishida over 6 years ago in reply to Jun Ishida

TI__Expert 5640 points

Hi Ross-san,

Please give me your feedback on the customer's setting of Bit-[15:14] at 0x14 address. Additionally, we have some questions and requests as below so please also provide your answer/comment to us as soon as possible.

1) For generating 1PPS from DP83640 without MAC operation, is the setting of Table 5-63. PTP_TXCFG1 at address 0x17 in the datasheet needed? Currently the customer doesn't set this register.

2) For generating 1PPS from DP83640 without MAC operation, is the setting of Table 5-66. PTP_RXCFG1 at address 0x1A in the datasheet needed? Currently the customer doesn't set this register.

3) For generating 1PPS from DP83640 without MAC operation, the customer is testing with two EVMs but they don't set the MAC address to each DP83640 because of no MAC devices. Do you think we need to set the unique MAC address to each DP83640 in Table 5-64 PSF_CFG0 at address 0x18?

4) Can you build the same EVM structure as the customer in your lab and create the 1PPS from DP83640? (two DP83640EVM, one USB-to-MDIO board only) If you could generate the PPS signal, then would you provide the script file to us?

Regards,

Jun

0 Ross Pimentel over 6 years ago in reply to Jun Ishida

TI__Mastermind 23675 points

Hi Jun,

You are outputting the PPS signal, but the accuracy is that of the clocks not correcting since you are not sending 1588 frames.
Frames must be sent for the PPS to be adjusted. Without frames, the link is established but only IDLES are being exchanged between the link partners. You must send frames so that the 640 can adjust the timestamp within the frame.

0 Jun Ishida over 6 years ago in reply to Ross Pimentel

TI__Expert 5640 points

Hi Ross-san,

Thank you for your feedback. In summary, we are already outputting the correct PPS signal with setting of bit-[15:14] at 0x14, but cannot reach to synchronize each 1PPS because of not using IEEE1588 frame, and we need to use MAC layer to send/receive the frame via MII. Is that understanding correct? I think PHY cannot build and send the frame alone, right?

Regards,

Jun

0 Ross Pimentel over 6 years ago in reply to Jun Ishida

TI__Mastermind 23675 points

Hi Jun,

Your understanding is correct.

If there is no frame transmission and reception, there is no time sync information being exchanged.

0 Jun Ishida over 6 years ago in reply to Ross Pimentel

TI__Expert 5640 points

Hi Ross-san,

I well understood, thank you. If the customer continues to test this with two DP83640 EVMs, they need the upper layer device so please let me know what the recommended EVM for MAC side is to achieve time sync with 1PPS? (MSP430EVM?)

Regards,
Jun

0 Ross Pimentel over 6 years ago in reply to Jun Ishida

TI__Mastermind 23675 points

Hi Jun,

You can use any MAC really since the PHY will be doing the HW timestamping.
However, you need to ensure that the uC you use has IP stack with 1588 capability.
Please check with our processor group in their forum on a recommended eval board and CCS build to run this.

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DP83640: Register dump for SNLA098A and SNOA548A