Hi,
I am attempting to interface dual 2-lane image sensors with a single '953 serializer. I realize this is not the intended use, however the two image sensors are identical and 'perfectly' aligned and use a single CSI-2 clock lane. Thus, input to the '953 is 1 clock and 4 data lanes (720mbps each), all synchronized. Is this allowable, or does the '953 monitor the header data and prevent this?
I'm seeing interesting behavior in that sometimes 2 of the MIPI input data lanes appear to not be terminated in the '953 (HS data voltage is ~550mV instead of typical 200mV). I can get the '953 to report no CSI-2 errors and a valid payload count, but no output from the '954. If I turn the '953 continuous clock off, the '954 outputs MIPI data but it's two copies of data lanes 0 & 1 (note replicate mode in the '954 is NOT enabled).
So, my first question is: Is there a definitive reason that I could not interface a single '953 with two image sensors in the manner described above? Is this just impossible to accomplish?
Many thanks!
-BJ
