Dear sir/madam,
As you might have gathered from other, earlier posts, we are looking to thoroughly demonstrate the compliance of our HDMI/DVI products that use TI interface ICs. Our first step is rational (theoretical) design.
However, simulation and measurement are essential checks if the theoretical analysis also holds in practice. In particular, we are trying to perform a TFP401 signal integrity simulation. We have found an IBIS model on this forum, but how should we evaluate the signals at the IC pins? For example, we could construct a data eye mask based on section 7-7, but what data jitter is acceptable (eye width)? Similarly, there is a clock jitter requirement, but what amplitude does that signal need to have? Does the jitter spectrum (of clock and data) matter?
A lot of questions, but in brief: how to set-up reliable (representative) signal integrity criteria for the TFP401? How did you do it yourself?
Thanks in advance,
Sjoerd Op 't Land