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Original question:

DP83867E: XI/XO interface model

DP83867E: XI/XO interface model

Michael T Schneider
Expert 3790 points
Part Number: DP83867E

Stray capacitance was assumed = 5pF. So, CL1=CL2 = 2*(20 [for xtal] – 5 [for stray]) = 30 pF. Make sense?

We think there is a failure mode with this XI/XO interface, that is, the PHY may work at a harmonic of the crystal frequency. How can we model this interface so that we know the PHY will only work at the crystal frequency, not at the harmonic?

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    TI__Mastermind 23675 points
    Hi Michael,

    With the correct load capacitance it is extremely unlikely that you would be able to get to a 3rd overtone.
    We do not have a model for the XI/XO besides the pin characteristics for the IBIS.

    The gain of the fundamental is much stronger than a 3rd or 5th overtone and should prevent the PHY from settling outside the fundamental.