Other Parts Discussed in Thread: DP83869
Hi Sirs,
Sorry to bother you.
Could you help double confirm our schematic?
Especially on Strap Pin setting,
Any suggestion are welcome.
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Hi Sirs,
Update as below
1. Refer to datasheet section 9.5.3 for recommended reset connection.
My RST is externally connected to the FPGA and sent by the FPGA.
The RC option on the SPEC is changed to the reservation mode. Is it OK?
2. LED[2:0] straps do not look right. There is no strap for RGMII clock skew. Refer to datasheet section 9.5.1 for strap configuration.
Refer to snla318.pdf, looks if the application is to be connected to the SFP
Connector is not configured to be changed to 1000Base-X?
3. In the case of the LED, the LED is reserved for 0,1, and the LAN active signal is LED 0?
4. End customer's SPEC is defined as follows
1x Electric Ethernet for future implementation of a Crypto Interface 10/100/1000Mb. This port is routed through the FPGA.
FPGA signal is RGMII, but I find some information which need SGMII then could support 10/100/1000Mb.
So the final application will be RGMII---SGMII---SFP connector?
Our new schematic as below, could you help double confirm it? Any suggestion are welcome
Hi Shu-Cheng,
I haven’t heard back from you, I’m assuming you were able to resolve your issue.
I will go ahead and close this thread. If you need further support, kindly open a new thread.
Regards,
Hung Nguyen