HD3SS3220：HD3SS3220 in DRP mode, ID pin level is incorrect

Gaoguo

1. Please remove C934 and C935 since it is already biased on TX1P/N and TX2P/N.

2. Do you have a power switch on USBS1_VBUS?

3. Are you plugging HD3SS3220 into a host or a device?

4. When Type-C is inserted, are you seeing both CC1 and CC2 voltage at 1.7V?

Thanks

David

Reply:
2. There is no power switch on USBS1_VBUS, which is directly connected to 5V on the external type-c.
3. When type-c is inserted, the HD3SS3220 is connected to the PC host.
4. When type-c is inserted, the voltage of CC1 and CC2 is about 0.4v. When type-c is not inserted, the voltage of CC1 and CC2 jumps between 1.9v and 1.2V.
The above data are from the undelete C934 and C93

Gaoguo

Is the HD3SS3220 in GPIO or USB mode?

You do need a power switch on USBS1_VBUS to make sure that power is off first and then will be enabled after the connection has been made as part of the USB Type-C spec. 

But you should only see voltage going high on one of CC lanes when Type-C is inserted. The CC pin that is at a higher voltage indicates the orientation of the plug.

Thanks

David

According to your prompt, if you want to break USBS1_VBUS first, how should you design the circuit.

The problem I am having now is that the ID pin does not indicate normal, as described in the datasheet.

Gaoguo

Do you have an update to this thread?

Thanks

David

Still testing, After setting up according to the datasheet, I have a new understanding of the application.

Gaoguo

Thanks for the update. I will close the thread for now, you can re-open it by responding back to this thread or create a new one.

Thanks

David