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DS90UB934-Q1: GPIO setting

Genius 4905 points

Part Number: DS90UB934-Q1

Hi, E2E member

I would like to use GPIO of following settings.
Could you tell me how to set registers?
I can't test because TI does not release DS90UB935-EVM.

DS90UB935_934_Setting_20190701_r1p0a.pdf

The others setting have alredy confirmed in this thread.
e2e.ti.com/.../808144


Regards,
Nao

  • Hello Nao,

    You can test this with the 953 EVM. It is the same device, just with lower CSI-2 speed. For register setting, input/output mode can be set in register 0x0E, and 0x0D controls remote GPIO enabling from the DES. 

    Best Regards,

    Casey 

  • Hello Casey

    I test this with the 953 and 934 EVM. But I can't use GPIO0.
    Please check my setting and advice me.

    reg_dump.zip

    Regards,
    Nao

  • Hello Nao,

    To send frame sync with GPIO0 through the back channel, please try the following programming on 934:

    0x4C = 0x01 # selects RX0 port

    0x6E = 0x8A # sets BC_GPIO0 to frame sync

    0x18 = 80 # selects GPIO0 for source of the frame sync

    For 953:

    0x0E = 0x1E # enable GPIO0 as output, all others as input

    0x0D = 0x10 # enable remote GPIO0 from DES

    Can you please try that first?

    Thanks,

    Casey 

  • Hello Casey

    GPIO does not work in this setting....
    Does it work well in your side?

    Regards,
    Nao

  • Hello Casey

    Can I get your update before vacation?

    Regards,

    Nao

  • Nao,

    I do not have an active bench setup for these devices to test with at this time. I would need to assemble one next week.

    Best Regards,

    Casey 

  • Hi Casey

    Thank you for your reply.
    I have one more question.

    Our test system(UB953&UB934) does not have "Back Channel Link detect".
    UB935's Reg 0x52(GENERAL_STATUS) is 0x04.


    I think we need more setting for connect to UB934.
    Would you tell me advice.
    I appreciate to get your advice today.

    Regards,
    Nao  

  • Hello Nao,

    Can you please let me know what MODE strapping configuration you are using for 935?

    Thanks,

    Casey 

  • Hello Casey

    You can confirm it on DS90UB935_934_Setting_20190701_r1p0a.pdf.

    This file uploaded in first thread.

    Regards

    Nao

  • Hello Casey

    Do you have any update?

    Regards,
    Nao

  • Hello Casey
    Can I get your answer?
    I'm sorry to rush you, but we need to update it to our customer.
    Let me know if you have any questions.
    Regards,
    Nao
  • Hello Casey

    I'm waiting for your update....

    Regards,
    Nao

  • Hello Nao,

    I apologize for the delay but it is difficult to set this up at the moment. I am asking another of my team members to investigate it but it will probably take until mid-next week. 

    Best Regards,

    Casey  

  • Hello Nao,

    Sending External Fsynch signal from 934 GPIO0 to 935 GPIO0.

    934:
    0x4C = 0x01
    0x58 = 0x58
    0x6D = 0x77
    0x10 = 0x00
    0x18 = 0x80
    0x0F[0] = 1
    0x6E[3:0] = 1010

    935:
    0x0D[7:4] = 1111
    0x0E[4] = 1
    0x0E[0] = 0

  • Hello Hamzeh

    Thank you for your update.
    I don't have UB935-EVM. Can I test this with the UB953 and UB934 EVM?

    Japan is national holiday today. So, I will check it and feedback to you tomorrow.

    Regards,
    Nao

  • Yes, you can use 953EVM for 935.

  • Hello Hamzeh

    I tested your scenario with UB953 and UB934 EVM but I can't see frame sync signal in UB953 GPIO0.
    Our test system(UB953&UB934) can not have "Back Channel Link detect".
    UB953's Reg 0x52(GENERAL_STATUS) is 0x04.
    I guess U953 and UB934 need more setting for connecting with each other.

    Could you tell me your all test scenario with UB953 and UB934 EVM?
    Ex) EVM sip switch setting
          FPD LINK cable connect port name
          Checking register name etc...

    Regards,
    Nao

  • Hello Nao,

    do not forget to set the 953 EVM in DVP mode to operate it with 934:

    1) Connect the external Oscillator (Y1)

    2) Change the Mode Pin resistors values as per the 953 d/s table 8. Alternatively when bit 4 of register 0x03 is set to 1, the Mode field (bits 2:0) is read/write and can be programmed to 101 to assign the correct DVP external clock backwards compatible MODE.

    For more details, please refer to the Application Note

  • Hello Hamzeh

    Thank you for your feedback. I have one more question.
    Have you checked your following setting with UB934 and UB935?

    934:
    0x4C = 0x01
    0x58 = 0x58
    0x6D = 0x77
    0x10 = 0x00
    0x18 = 0x80
    0x0F[0] = 1
    0x6E[3:0] = 1010

    935:
    0x0D[7:4] = 1111
    0x0E[4] = 1
    0x0E[0] = 0

    Regards,
    Nao

  • I have not checked this by myself but I know it should worke! Unfortunately I can't test it.

  • Hello Hamzeh

    You wrote "Sending External Fsynch signal from 934 GPIO0 to 935 GPIO0" in the previous thread.
    But our customer try to do "Sending External signal from 935 GPIO1 to 934 GPIO1".

    Could you tell me how to set registers in this case?

    Regards,
    itabi

  • Hello Nao,

    For sending a signal over GPIO1,

    On the 935, write
    Reg 0x0E[1]=1 and [5]=0
    Reg 0x0D[5]=0
    Reg 0x33 = 0x06
       
    On the 934, write
    Reg 0x11=0x21
    Reg 0x0F[1]=0
    Reg 0x59 = 0x02

  • Hello Hamzeh

    What is 0x59 register?
    This register is RESERVED in UB934 D/S.

    > On the 934, write
    > Reg 0x59 = 0x02

    Regards,
    Nao

  • Hello Nao,

    Sorry, leave 0x59 to 0x00 as default.

  • Hello Hamzeh

    Thank you for your great support but our customer does not work the GPIO well at your register setting.

    So, could you check the below use case in UB934 and UB935 EVM?
    could you send me the all register dumps for this setting, if it works fine?
    We can't tell my customer that you don't confirm that works fine in EVMs.

    Case1 "Sending External signal from 935 GPIO1 to 934 GPIO1".
    Case2 "Sending External signal from 934 GPIO0 to 935 GPIO0".

    Regards,
    Nao

  • Nao,

    Are you sure the customer has tried my settings already and it is not working?

    I know my settings are going to work as mentioned above to 100%. I told you to forget about register 0x59 because it is reserved and it should work without modifying this register.

    Also please double check your requirements before asking the question in the future. This is the third time you are changing the requirements:

    First you said only External FSync - 934 GPIO0 - 935 GPIO0.

    Then you said only External Signal - 935 GPIO1 - 934 GPIO1.

     And now you are saing:

    External signal - 935 GPIO1 - 934GPIO1 and External signal - 934 GPIO0 - 935 GPIO0!!!!

       

    As I told you, I do not have the possibility to test this. You can follow my instructions and test by yourself.

    Please send me the register dumps when you try these.

     


    Kind Regards,

    Hamzeh

  • Hello Hamzeh

    No. I didn't change my the requirements.
    Please check my first thread and PDF.

    - External signal - 935 GPIO1 - 934 GPIO1
    - External signal - 934 GPIO0 - 935 GPIO0

    Casey changed FS requirement.
    I thought that External input is difficult in his environment and changed the setting.
    So, I thought if I can confirm GPIO0 of UB935 output FS signal, I change the GPIO configuration to GPIO0 input from internal FS in our side.
    If I think now, I should I tell Casey that he has misunderstanding. And we should have confirmed each other.
    Sorry for confuse you.

    Could you tell me register setting of the below again?
    Especially could you tell me setting order from UB934 and UB935 boot up?

    - External signal - 935 GPIO1 - 934 GPIO1
    - External signal - 934 GPIO0 - 935 GPIO0

    Regards,
    Nao

  • Nao,

    There is no special sequence for writing these.

    For sending external signal from 935 GPIO1 to 934 GPIO1:

    On the 935, write
    Reg 0x0E[1]=1 and [5]=0
    Reg 0x0D[5] = 0
    Reg 0x33 = 0x07
      
    On the 934, write
    Reg 0x11 = 0x21
    Reg 0x0F[1] = 0

    =============================================

    For sending external signal from 934 GPIO0 to 935 GPIO0:

    On the 934, write
    Reg 0x10=0x00
    Reg 0x0F[0]=1
    Reg 0x6E[3:0]=0000


    On the 935, write
    Reg 0x0E[0]=0 and [4]=1
    Reg 0x0D[4]=1
    Reg 0x33 = 0x06

    ============================================

    for doing both functions at the same time:

    On the 935, write
    Reg 0x0E = 0x12
    Reg 0x0D = 0x10
    Reg 0x33 = 0x07
      
    On the 934, write
    Reg 0x10 = 0x00
    Reg 0x11 = 0x21
    Reg 0x0F = 0x01
    Reg 0x6E[3:0]=0000

  • Hi Hamzeh

    Thank you for your understanding and quick feedback.
    I updated my customer setting for their requirement.
    This setting is included in your advice.
    Could you re-confirm this settings?


    Regards,
    Nao

  • Hello Nao,

    This looks good.

    If possible please test the settings at your end before sharing with customer.

     

  • Hello Hamzeh

    I don’t have UB935 EVM, because TI doesn’t sale it.

    Hence, I ask E2E.

    I can’t test it myself.

    So, I asked you that check it in your side.

    Regards,

    Nao

  • Hello Nao,

    As you said, we do not have 935EVM, so you can use the 953EVM.

    Also I have said multiple times that it is not possible for me to test these. Sorry!

     

  • Hello Hamzeh

    Our customer is checking their system.
    Please wait my feedback.

    Regards,
    Nao