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Original question:

DP83867IR: IO_IMPEDANCE_CTR

DP83867IR: The difference between auto-negotiation 1000M and forced 1000M

Chen Jiao
Intellectual 810 points
Part Number: DP83867IR
Other Parts Discussed in Thread: AM3352

Hi Team,

The customer is using the AM3352 and DP83867IR for iperf3 test.

In auto-negotiate mode, DP83867IR is configured as 1000Mbps and the other side is 100M ethernet, and the speed is stable 94Mbps.

However, when DP83867 is configured as 100Mbps, the test speed is 60~70Mbps.

Could you please explain this situation for me? And what's the difference between the two configurations?

Thanks a lot.

Best regards

Chen

  • 0
    TI__Mastermind 26320 points

    Hi Chen,

    Auto-Negotiation configuration of speed just inform the Link Partner about the capabilities of the Phy. However the Link will be formed at the speed common to both DUT and Link Partner. 

    In both case, the link formed shall be 100M speed only. Change in Auto-negotiation capability do not expect to change the actual speed.

    Regards,
    Geet

  • 0 in reply to Geet Modi
    TI__Intellectual 810 points

    Hi Geet,

    Sorry for the obscure. The detail is explained below.

    The speed is tested between a computer and communication board with DP83867 on it.

    In one situation, the computer is configured as full-duplex 100M and the communication board is configured at auto-negotiation mode. The iperf3 test speed is stable 94Mbps.

    In another situation, the computer is configured as auto-negotiation and the communication board is configured at 100Mbps. However, the iperf3 test speed is only 60~70Nbps.

    The register under two situations are attached. I found that only the next page configuration is different.

    Fullscreen Computor 100M and equipment auto-nego.txt Download 
    # ./phyreg eth1 0
read phy addr: 0x0  reg: 0x0   value : 0x1140

# ./phyreg eth1 1
read phy addr: 0x0  reg: 0x1   value : 0x796d

# ./phyreg eth1 3
read phy addr: 0x0  reg: 0x3   value : 0xa231

# ./phyreg eth1 4
read phy addr: 0x0  reg: 0x4   value : 0x1e1

# ./phyreg eth1 5
read phy addr: 0x0  reg: 0x5   value : 0xc181

# ./phyreg eth1 6
read phy addr: 0x0  reg: 0x6   value : 0x6f

# ./phyreg eth1 7
read phy addr: 0x0  reg: 0x7   value : 0x2001

# ./phyreg eth1 8
read phy addr: 0x0  reg: 0x8   value : 0x6801

# ./phyreg eth1 9
read phy addr: 0x0  reg: 0x9   value : 0x300

# ./phyreg eth1 10
read phy addr: 0x0  reg: 0xa   value : 0x0

# ./phyreg eth1 11
read phy addr: 0x0  reg: 0xb   value : 0x0

# ./phyreg eth1 12
read phy addr: 0x0  reg: 0xc   value : 0x0

# ./phyreg eth1 13
read phy addr: 0x0  reg: 0xd   value : 0x401f

# ./phyreg eth1 14
read phy addr: 0x0  reg: 0xe   value : 0xa8

# ./phyreg eth1 15
read phy addr: 0x0  reg: 0xf   value : 0x3000

# ./phyreg eth1 16
read phy addr: 0x0  reg: 0x10   value : 0x4040

# ./phyreg eth1 17
read phy addr: 0x0  reg: 0x11   value : 0x7c02

# ./phyreg eth1 18
read phy addr: 0x0  reg: 0x12   value : 0x0

# ./phyreg eth1 19
read phy addr: 0x0  reg: 0x13   value : 0x1c40

# ./phyreg eth1 20
read phy addr: 0x0  reg: 0x14   value : 0x29c7

# ./phyreg eth1 21
read phy addr: 0x0  reg: 0x15   value : 0x0

# ./phyreg eth1 22
read phy addr: 0x0  reg: 0x16   value : 0x0

# ./phyreg eth1 23
read phy addr: 0x0  reg: 0x17   value : 0x40

# ./phyreg eth1 24
read phy addr: 0x0  reg: 0x18   value : 0x6150

# ./phyreg eth1 25
read phy addr: 0x0  reg: 0x19   value : 0x4444

# ./phyreg eth1 26
read phy addr: 0x0  reg: 0x1a   value : 0x2

# ./phyreg eth1 27
read phy addr: 0x0  reg: 0x1b   value : 0x0

# ./phyreg eth1 28
read phy addr: 0x0  reg: 0x1c   value : 0x0

# ./phyreg eth1 29
read phy addr: 0x0  reg: 0x1d   value : 0x0

# ./phyreg eth1 30
read phy addr: 0x0  reg: 0x1e   value : 0x2

# ./phyreg eth1 31
read phy addr: 0x0  reg: 0x1f   value : 0x0

# ./phyreg eth1 32
read phy addr: 0x0  reg: 0x20   value : 0xffea

# ./phyreg eth1 33
read phy addr: 0x0  reg: 0x21   value : 0xffea

# ./phyreg eth1 34
read phy addr: 0x0  reg: 0x22   value : 0xffea

# ./phyreg eth1 35
read phy addr: 0x0  reg: 0x23   value : 0xffea

# ./phyreg eth1 36
read phy addr: 0x0  reg: 0x24   value : 0xffea

# ./phyreg eth1 37
read phy addr: 0x0  reg: 0x25   value : 0xffea

# ./phyreg eth1 38
read phy addr: 0x0  reg: 0x26   value : 0xffea

# ./phyreg eth1 39
read phy addr: 0x0  reg: 0x27   value : 0xffea

# ./phyreg eth1 40
read phy addr: 0x0  reg: 0x28   value : 0xffea

# 
# 
# 
# 
# 
#

    Fullscreen Computor auto-nego and equipment 100M.txt Download 
    # ./phyreg eth1 0
read phy addr: 0x0  reg: 0x0   value : 0x2100

# ./phyreg eth1 1
read phy addr: 0x0  reg: 0x1   value : 0x794d

# ./phyreg eth1 2
read phy addr: 0x0  reg: 0x2   value : 0x2000

# ./phyreg eth1 3
read phy addr: 0x0  reg: 0x3   value : 0xa231

# ./phyreg eth1 4
read phy addr: 0x0  reg: 0x4   value : 0x1e1

# ./phyreg eth1 5
read phy addr: 0x0  reg: 0x5   value : 0x0

# ./phyreg eth1 6
read phy addr: 0x0  reg: 0x6   value : 0x66

# ./phyreg eth1 7
read phy addr: 0x0  reg: 0x7   value : 0x2001

# ./phyreg eth1 8
read phy addr: 0x0  reg: 0x8   value : 0x0

# ./phyreg eth1 8
read phy addr: 0x0  reg: 0x8   value : 0x0

# ./phyreg eth1 9
read phy addr: 0x0  reg: 0x9   value : 0x300

# ./phyreg eth1 10
read phy addr: 0x0  reg: 0xa   value : 0x0

# ./phyreg eth1 11
read phy addr: 0x0  reg: 0xb   value : 0x0

# ./phyreg eth1 12
read phy addr: 0x0  reg: 0xc   value : 0x0

# ./phyreg eth1 13
read phy addr: 0x0  reg: 0xd   value : 0x401f

# ./phyreg eth1 14
read phy addr: 0x0  reg: 0xe   value : 0xa8

# ./phyreg eth1 15
read phy addr: 0x0  reg: 0xf   value : 0x3000

# ./phyreg eth1 16
read phy addr: 0x0  reg: 0x10   value : 0x4000

# ./phyreg eth1 17
read phy addr: 0x0  reg: 0x11   value : 0x7c02

# ./phyreg eth1 18
read phy addr: 0x0  reg: 0x12   value : 0x0

# ./phyreg eth1 19
read phy addr: 0x0  reg: 0x13   value : 0x5c04

# ./phyreg eth1 20
read phy addr: 0x0  reg: 0x14   value : 0x29c7

# ./phyreg eth1 21
read phy addr: 0x0  reg: 0x15   value : 0x0

# ./phyreg eth1 22
read phy addr: 0x0  reg: 0x16   value : 0x0

# ./phyreg eth1 23
read phy addr: 0x0  reg: 0x17   value : 0x40

# ./phyreg eth1 24
read phy addr: 0x0  reg: 0x18   value : 0x6150

# ./phyreg eth1 25
read phy addr: 0x0  reg: 0x19   value : 0x4444

# ./phyreg eth1 26
read phy addr: 0x0  reg: 0x1a   value : 0x2

# ./phyreg eth1 27
read phy addr: 0x0  reg: 0x1b   value : 0x0

# ./phyreg eth1 28
read phy addr: 0x0  reg: 0x1c   value : 0x0

# ./phyreg eth1 29
read phy addr: 0x0  reg: 0x1d   value : 0x0

# ./phyreg eth1 30
read phy addr: 0x0  reg: 0x1e   value : 0x2

# ./phyreg eth1 31
read phy addr: 0x0  reg: 0x1f   value : 0x0

# ./phyreg eth1 32
read phy addr: 0x0  reg: 0x20   value : 0xffea

# ./phyreg eth1 33
read phy addr: 0x0  reg: 0x21   value : 0xffea

# ./phyreg eth1 34
read phy addr: 0x0  reg: 0x22   value : 0xffea

# ./phyreg eth1 35
read phy addr: 0x0  reg: 0x23   value : 0xffea

# ./phyreg eth1 36
read phy addr: 0x0  reg: 0x24   value : 0xffea

# ./phyreg eth1 37
read phy addr: 0x0  reg: 0x25   value : 0xffea

# ./phyreg eth1 38
read phy addr: 0x0  reg: 0x26   value : 0xffea

# ./phyreg eth1 39
read phy addr: 0x0  reg: 0x27   value : 0xffea

    Could you please explain the reason for me? Have you meet the same situation before?

    Thanks a lot.

    Best regards

    Chen

  • 0 in reply to Chen Jiao
    TI__Mastermind 26320 points

    Hi,

    The register logs indicates link is formed in 100M and Full Duplex.

    Register 0x0001 and 0x0011 indicates link speed and mode. They are same in both cases.

    You shall get same data rate for both cases. Have you tried few times ? You may want to try the same with two DP83867 connected to each other.

    Regards,

    Geet

  • 0 in reply to Geet Modi
    TI__Intellectual 810 points

    Hi Geet,

    Thanks for your reply.

    We have done the test several times. The test results are attached, include some iperf3 speed data.

    I think the computer side is ok because the customer uses the same method with other Phys, the speed is stable 94~96Mbps.

    We have done the lookback in different situation before and the data speed is normal. Could it be possible that the issue comes from the driver or the configuration of software? Could you please tell me one method to verified it? Thanks a lot.

    Test results.docx

  • 0 in reply to Chen Jiao
    TI__Mastermind 26320 points

    Hi,

    Can you check if the link made in second case in half duplex instead of full duplex ?

    Regards,
    geet

  • 0 in reply to Geet Modi
    TI__Mastermind 26320 points

    Hi,

    I am closing this thread. Incase you need further assistance, please open new thread and provide reference to this thread.

    Regards,

    Geet