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Original question:

DP83640: DP83640 IEEE1588 timestamp issue

DP83640: One-step transmit time stamping problem in Layer2 mode

Ivan Kalatchev
Prodigy 50 points

Part Number: DP83640

Hi Team,

I'm having trouble to implement v.2 one-step E2E Layer2 ( 802.1AS) mode. When after exchanging announce messages master starts sending sync messages, transmit timestamp that's goes into originTimestamp fields of the sync message doesn't change. First sync message actually also has it not write - seconds are off, but all subsequent sync messages have exactly same originTimestamp as the first one:

Raw frame sequence 1 sync sent at 1564059373 sec UTC:

netSendRaw: 0000: 01 1b 19 00 00 00 8c db 25 00 04 0b 88 f7 10 02
netSendRaw: 0010: 00 2c 00 00 00 00 00 00 00 00 00 00 00 00 00 00
netSendRaw: 0020: 00 00 8c db 25 ff fe 00 04 0b 00 01 00 01 00 01
netSendRaw: 0030: 00 00 00 00 00 00 00 00 00 00

Raw frame sequence 1 sync received:

netRecvRaw: 0000: 01 1b 19 00 00 00 xx xx xx 00 04 0b 88 f7 10 02
netRecvRaw: 0010: 00 2c 00 00 00 00 00 00 00 00 00 00 00 00 00 00
netRecvRaw: 0020: 00 00 xx xx xx ff fe 00 04 0b 00 01 00 0b 00 01
netRecvRaw: 0030: 00 00 5d 39 a6 a3 1f 16 64 a0 a3 cc ed 96 5d 39         => originTimestamp sec: 1564059299 - 74 seconds difference
netRecvRaw: 0040: a6 ba

Raw frame sequence 2 sync sent at 1564059375 sec UTC:

netSendRaw: 0000: 01 1b 19 00 00 00 8c db 25 00 04 0b 88 f7 10 02
netSendRaw: 0010: 00 2c 00 00 00 00 00 00 00 00 00 00 00 00 00 00
netSendRaw: 0020: 00 00 8c db 25 ff fe 00 04 0b 00 01 00 02 00 01
netSendRaw: 0030: 00 00 00 00 00 00 00 00 00 00

Raw frame sequence 2 sync received:

netRecvRaw: 0000: 01 1b 19 00 00 00 8c db 25 00 04 0b 88 f7 10 02
netRecvRaw: 0010: 00 2c 00 00 00 00 00 00 00 00 00 00 00 00 00 00
netRecvRaw: 0020: 00 00 8c db 25 ff fe 00 04 0b 00 01 00 02 00 01
netRecvRaw: 0030: 00 00 5d 39 a6 a3 1f 16 64 a0 9f 16 04 a0 5d 39          => originTimestamp sec: 1564059299 - 76 seconds difference, and so on.
netRecvRaw: 0040: a6 a5

All subsequent received sync messages have the same originTimestamp as in Sequence 1.

I'm using appending of received timestamps in this case, but when I tried insertion it didn't make any difference.

dp83640 were configured on both units as follows:

TX CFG0 : 44677 
TX CFG1 : 63504

RX CFG0: 165
RX CFG1: 63504
RX CFG3: 51968
RX CFG4: 28672

Note, that V.2 UDP one-step mode works fine, writing correct timestamps into outgoing sync messages, so maybe I'm missing some additional configuration for Layer2?

I would appreciate any help with this matter.

Best regards,

Ivan

  • 0
    Prodigy 50 points

    Just to clarify flags that are set for dp83640:

    TX CFG0:      SYNC_1STEP | DR_INSERT | IGNORE_2STEP | CRC_1STEP | CHK_1STEP | TX_L2_EN | TX_TS_EN

    TX CFG1:      mask:  0xF8,  first byte: 0x10   - transfer specific set to 1

    RX CFG0:     RX_L2_EN | RX_IPV4_EN |  RX_TS_EN

    RX CFG1:    mask:  0xF8,  first byte: 0x10   - transfer specific set to 1

    RX CFG3:   ACC_UDP | TS_APPEND | TS_INSERT,  TS_MIN_IFG set to 12

    RX CFG4:    TS_SEC_EN , write all 4 bytes for seconds with 0 offsets (appending)

    Ivan

  • 0 in reply to Ivan Kalatchev
    TI__Mastermind 23675 points

    Hi Ivan,

    We will review this and get back to you.

  • 0 in reply to Ross Pimentel
    TI__Mastermind 23675 points

    Hi Ivan,

    Does IPv4/6 also work fine?

    Have you confirmed that the register writes you are making for configuration are occurring and to the correct field?

    Based on the review of what you describe above, nothing stands out as incorrect in your configuration.

  • 0 in reply to Ross Pimentel
    Prodigy 50 points

    Hi Ross,

    I didn't try IPV6, but IPV4 works fine. One-step synchronization over UDP works, inserting transmit timestamp correctly. I also checked registers and reading back TX CFG0 shows all required bits set.

    I even tried to enable IPV4 and IPV6 alongside with L2, but timestamping still didn't work. Timestamp is written once ( I think it's time stamp of configuration of the chip, not actual timestamp of first transmit ) and then never changes. 

    Regards,
    Ivan

  • 0 in reply to Ivan Kalatchev
    Prodigy 50 points

    Hi Ross,

    I tried  two-step sync over Layer2 by removing SYNC_1STEP flag from  TX CFG0. I expected to see  TXTS_RDY bit in PTP_STS register set after sync event message was sent, but it wasn't. It seems like dp83640 in Layer2 mode in my case doesn't process transmitted sync message as event message and doesn't time stamp it. Although it does process correctly sync message when receiving it. This explains why one-step synchronization doesn't work either, but still question remains - what could possibly prevent transmitted sync message to be recognized as event message while in Layer2 mode? Is there some additional configuration required that I'm missing or could be configured wrong in my case?

    Best regards,

    Ivan

  • 0 in reply to Ivan Kalatchev
    Prodigy 50 points

    So I think I figured this out, at least partially. Problem is in DR_INSERT flag I added to TX CFG0. Idea was to use this to eliminate timestamping of delay request messages when they are transmitted and instead append TX timestamp to incoming delay response. But looks like either I didn't understand how this works, or something is not right. Setting this flag prevented in my case timestamping of sync messages - timestamps were not generated correctly and no notifications were generated either. As soon as flag was removed, TX time stamps start to work fine. I didn't try to enable this flag for slave only (after state is known) and disable if clock becomes master, though this could work.

    Ivan