Hi,
I am planning on controlling the LOS pins by using SCL/SDA as the control mode and I will be connecting these SCL/SDA pins to an FPGA with pullup resistors.
For the other pins, I am planning on doing the following even though I will be using SCL/SDA as the control mode:
- LOSL = open, to have it default on powerup to the lower LOS assert threshold voltage even though I plan on setting register address 0 bit 0 for the serial control mode
- LOSR = connecting to FPGA to be configured
- VTH = open, for default 0V differential threshold.
Let me know if you see any problems with this approach or if this is correct.
Thanks,
HSG
