Part Number: DP83848I
Hi Geet,
We don't understand.
All of TI's PHYs require MII's TX_CLK to TXD0 to require min 10ns?
According to the standard, in the MII mode, TX_CLK is sent by the PHY to the MAC, and the TXD of the MAC is delayed by Tov (0ns-25ns). For example, if the MAC outputs TXD after 2 ns, then the 10 ns requirement of the PHY cannot be met.