DS90UB913A-Q1: 10-bit mode : HS timing

Masaaki Sugiyama68

Expert 1445 points

Part Number: DS90UB913A-Q1

Dear Support Team;

I would like to confirm the following sentence.

I think the following timing.

Is it correct?

Best Regards,

Masaaki Sugiyama

over 5 years ago

0 Masaaki Sugiyama68 over 5 years ago

Expert 1445 points

Dear Support Team;

I made a mistake.

I would like to confirm the following sentence.

"10-bits of DATA + 2 SYNC bits for an input PCLK range of 50 MHz to 100 MHz in the 10-bitmode.

Note:HS/VS restricted to no more than one transition per 10 PCLK cycles."

Best Regards,

Masaaki Sugiyama

0 Casey McCrea over 5 years ago in reply to Masaaki Sugiyama68

TI__Guru** 103215 points

Hello Masaaki,

I still do not understand your question. Can you please restate it a little bit more clearly?

Best Regards,

Casey

0 Masaaki Sugiyama68 over 5 years ago in reply to Casey McCrea

Expert 1445 points

Dear Casey-san

Sorry for not enough my information.

I made explanation file and upload.

Could you confirm it?

10bit-mode_HS.pptx

B.R

Masaaki Sugiyama

0 Casey McCrea over 5 years ago in reply to Masaaki Sugiyama68

TI__Guru** 103215 points

Hello Masaaki,

The datasheet is saying that the HS and VS signals can not have a pulse with less than 10 PCLK cycles. What goes into the 913A is the same as what comes out of the 914A. It does not change the HS/VS width.

Best Regards,

Casey

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DS90UB913A-Q1: 10-bit mode : HS timing